From patchwork Tue May 29 15:43:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 137192 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp4215537lji; Tue, 29 May 2018 08:47:11 -0700 (PDT) X-Google-Smtp-Source: AB8JxZr56Wd/WZa5637GnAyU+cViPuU6HHNBS/ZNnv5wKRFIuFIIr4DAAEaCQEXYAc2U0o4oWtHm X-Received: by 2002:a17:902:7283:: with SMTP id d3-v6mr18405213pll.192.1527608831539; Tue, 29 May 2018 08:47:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527608831; cv=none; d=google.com; s=arc-20160816; b=KhKUh/IdmSfrd8cK7KQNr5/BZ/Yo7Ufeq3R3IZXocS7BLS8G2rq9y5IlMkyhr2m5Ah P8BlF342oyhtujHlH6/dKQ8aCbmra90N+NZwzwtzSoqDttkjyPJAZy5KcR9WUyloMlC8 RStk3DRr59rHqc3ihUJmI91KyjOs3dlXWSGKdsgswKOa8dUM7WATtfs8ocJIUfR+OB1r v590Go2NZROXE/vc2VoyUdZsWhQiUHlmvtgrJYZPAs0ycbm9WU8O3SP7FdxCASHdRiAA lCyXe0ZgHWyk6afHO90aWWKi21DGqDQoc572UT5LozQIXthxZqTrb3yNwQVrvoIbWZ31 8qYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=y3olNnpQu5ih5pNXArUNG/eRBNipb3D38UsMnVPwSWg=; b=rd0y+nfle1Dg7YM4S/FooAaZ16T7e+12T7bSrGE6iqr2Y8RCG0ZUuDtONsFJmeHlD1 lSc4vMUJgPnEffLNlq/23udPIQW2BaSrLcE9APwqM8A1E+xIrhI1nCoLYxuStBzksGO8 vCBBT6Zf1zPGwjqydpfVC2xEVzkkHzXZhFFbTnGHSRPfBsO9OCsBfnIWlGesxAVOH19N D/KY7Mp4aYfC/9ajhJnRPHDqq/EZZfLktuzjrWOOr87kVZoUJJQyMt+U8P0ZrJOxV2g/ 9RfaQyo7JbBxa383ELY+3ZwGbm9ZprDR1TeplW8rpwZxtJWxlOXgTDE8hNtdTP4mmOTV Ncgg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a98-v6si32628430pla.239.2018.05.29.08.47.11; Tue, 29 May 2018 08:47:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936435AbeE2PrJ (ORCPT + 30 others); Tue, 29 May 2018 11:47:09 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:43490 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936829AbeE2PoZ (ORCPT ); Tue, 29 May 2018 11:44:25 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B439F15AD; Tue, 29 May 2018 08:44:24 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 838933F25D; Tue, 29 May 2018 08:44:23 -0700 (PDT) From: Mark Rutland To: linux-kernel@vger.kernel.org Cc: Mark Rutland , Boqun Feng , Will Deacon , Palmer Dabbelt , Albert Ou Subject: [PATCHv2 11/16] atomics/riscv: define atomic64_fetch_add_unless() Date: Tue, 29 May 2018 16:43:41 +0100 Message-Id: <20180529154346.3168-12-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180529154346.3168-1-mark.rutland@arm.com> References: <20180529154346.3168-1-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As a step towards unifying the atomic/atomic64/atomic_long APIs, this patch converts the arch/riscv implementation of atomic64_add_unless() into an implementation of atomic64_fetch_add_unless(). A wrapper in will build atomic_add_unless() atop of this, provided it is given a preprocessor definition. No functional change is intended as a result of this patch. Signed-off-by: Mark Rutland Acked-by: Peter Zijlstra (Intel) Cc: Boqun Feng Cc: Will Deacon Cc: Palmer Dabbelt Cc: Albert Ou --- arch/riscv/include/asm/atomic.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) -- 2.11.0 diff --git a/arch/riscv/include/asm/atomic.h b/arch/riscv/include/asm/atomic.h index 5f161daefcd2..d959bbaaad41 100644 --- a/arch/riscv/include/asm/atomic.h +++ b/arch/riscv/include/asm/atomic.h @@ -352,7 +352,7 @@ static __always_inline int atomic_fetch_add_unless(atomic_t *v, int a, int u) #define atomic_fetch_add_unless atomic_fetch_add_unless #ifndef CONFIG_GENERIC_ATOMIC64 -static __always_inline long __atomic64_add_unless(atomic64_t *v, long a, long u) +static __always_inline long atomic64_fetch_add_unless(atomic64_t *v, long a, long u) { long prev, rc; @@ -369,11 +369,7 @@ static __always_inline long __atomic64_add_unless(atomic64_t *v, long a, long u) : "memory"); return prev; } - -static __always_inline int atomic64_add_unless(atomic64_t *v, long a, long u) -{ - return __atomic64_add_unless(v, a, u) != u; -} +#define atomic64_fetch_add_unless atomic64_fetch_add_unless #endif /*