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[209.132.180.67]) by mx.google.com with ESMTP id k198si3413404pgc.299.2018.03.01.19.54.09; Thu, 01 Mar 2018 19:54:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BhwDFGIT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1164781AbeCBDyE (ORCPT + 28 others); Thu, 1 Mar 2018 22:54:04 -0500 Received: from mail-pf0-f193.google.com ([209.85.192.193]:37452 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1164732AbeCBDwA (ORCPT ); Thu, 1 Mar 2018 22:52:00 -0500 Received: by mail-pf0-f193.google.com with SMTP id h11so3033342pfn.4 for ; Thu, 01 Mar 2018 19:52:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=uAx1vA24Mq41TzpmYpXGvaJ+GYIPjxEfE3ErymFJ74M=; b=BhwDFGITSJQGMxqTq0QIt5XqvzSiyXx4BJbAZFDj4hwDW0kBcXHka9GPUyFVCbSIBI tDq3HUG3SKcGGOIfFjM34rVq9D9Lx4qQVyaCgUIVD8+r3NUFAHy7se1mgrDIvZ3CcdOy RXncrc99dSe2NQNZElP7mkXonqPNmkSS6lb18= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=uAx1vA24Mq41TzpmYpXGvaJ+GYIPjxEfE3ErymFJ74M=; b=tBu2hMq7xsuRoHGKPpl4NkNwwypmDtU2x4GfPYuEqigQecvyvavppQft+vWGh5ko/+ QA1tgV6/08KNVnPE7VPBTZk58gySdV0TdWIS5edGOCV6trD9yYEEdDR8MzcY9Lf+FMxB DIBS/uamtADZMA1OqJ44i2UtDWJVcMRN6FRjDVmlgzZ4wv5tFt3XSDVhFqPyBqYG/Ikb Uv4Ru+/9Q/MsQ+G0L9YxyRwjNNbb19PTWIxdlCZQL+W3PUbfBCIvPwDR6J6kRQ2cFV/c j37ATrPPGdAsCP6Ys/aOfS6qZvuYx/72VNYcEM2KHEm40HgSbAHLQea6oCvYUB/lSnBH opug== X-Gm-Message-State: APf1xPCSagR8ns1hqbv37ulIZ4BODWFE28x2TELzxCs7UIr45biyrJAe jzyJsQrS1sJAfKV1+Dt25u4x X-Received: by 10.98.58.129 with SMTP id v1mr4255209pfj.203.1519962719892; Thu, 01 Mar 2018 19:51:59 -0800 (PST) Received: from localhost.localdomain ([2405:204:71c0:7f9a:bd87:b648:dccb:cbc9]) by smtp.gmail.com with ESMTPSA id n66sm10284997pfn.111.2018.03.01.19.51.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 01 Mar 2018 19:51:59 -0800 (PST) From: Manivannan Sadhasivam To: linus.walleij@linaro.org, robh+dt@kernel.org, afaerber@suse.de Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, Manivannan Sadhasivam Subject: [PATCH v4 05/10] dt-bindings: gpio: Add gpio nodes for Actions S900 SoC Date: Fri, 2 Mar 2018 09:20:40 +0530 Message-Id: <20180302035045.14660-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180302035045.14660-1-manivannan.sadhasivam@linaro.org> References: <20180302035045.14660-1-manivannan.sadhasivam@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add gpio nodes for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam --- .../devicetree/bindings/gpio/actions,owl-gpio.txt | 95 ++++++++++++++++++++++ 1 file changed, 95 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt -- 2.14.1 diff --git a/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt new file mode 100644 index 000000000000..d2939ca6cfaf --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt @@ -0,0 +1,95 @@ +* Actions Semi OWL GPIO controller bindings + +The GPIOs are organized as individual banks/ports with variable number +of GPIOs. Each bank is represented as an individual GPIO controller. + +Required properties: +- compatible : Should be "actions,s900-gpio" +- reg : Address and range of the GPIO controller registers. +- gpio-controller : Marks the device node as a GPIO controller. +- #gpio-cells : Should be <2>. The first cell is the gpio number + and the second cell is used to specify optional + parameters. +- interrupt-controller : Marks the device node as an interrupt controller. +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt. Shall be set to 2. The first cell + defines the interrupt number, the second encodes + the trigger flags described in + bindings/interrupt-controller/interrupts.txt + +Optional properties: +- gpio-ranges : Mapping between GPIO and pinctrl + +Note: Each GPIO port should have an alias correctly numbered in "aliases" +node. + +Examples: + +aliases { + gpio0 = &gpioa; + gpio1 = &gpiob; + gpio2 = &gpioc; + gpio3 = &gpiod; + gpio4 = &gpioe; + gpio5 = &gpiof; +}; + + gpioa: gpioa@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 0 32>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpiob: gpiob@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 32 32>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpioc: gpioc@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 64 12>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpiod: gpiod@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 76 30>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpioe: gpioe@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 106 32>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpiof: gpiof@e01b0000 { + compatible = "actions,s900-gpio"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 138 8>; + interrupt-controller; + #interrupt-cells = <2>; + };