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[209.132.180.67]) by mx.google.com with ESMTP id e18si12359355pfi.130.2018.02.22.03.19.38; Thu, 22 Feb 2018 03:19:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Q6ktHvwz; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932177AbeBVLTg (ORCPT + 28 others); Thu, 22 Feb 2018 06:19:36 -0500 Received: from mail-it0-f67.google.com ([209.85.214.67]:38913 "EHLO mail-it0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932080AbeBVLTb (ORCPT ); Thu, 22 Feb 2018 06:19:31 -0500 Received: by mail-it0-f67.google.com with SMTP id l187so6067743ith.4 for ; Thu, 22 Feb 2018 03:19:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QF60Fq3LXgQ/Pd/Rp8F+Wxzz522rhmYJZ34ba4IgsUA=; b=Q6ktHvwzgTxkesbjdLksjP6ZQYlj6arusHeRFijc1eWX+kpvaUDiW9puGMWUFYq+RX MElfzjBUlibLERBBX/WNdzHIHYxw0H3PA78pWC9ECcskj3dqanWIjQtxWs0NA/YIwekT t2xJb/AukRPU99+8YMkV0TOiRjU3usRlDcowk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QF60Fq3LXgQ/Pd/Rp8F+Wxzz522rhmYJZ34ba4IgsUA=; b=F1A4HwkhEm8mJ+8ygvUI6su/5NGqNgprhpm22CH4w37eB/9gGYEOmEYC6C/Et4km1m 6c7s40jwJw5nUGjq6ZAvO1pCn6aff9XaNVnZLp5T4/pMTaVkc3TgzC7ouwbx/BJ+bKUE E/Axe1Lby27TEP98Hl0FDipk0qFQYfkaMfv0Xwf/GEXMSzgIoirpYTa7t+eVsevzJrGc uFhFkjVWVT3drLxbEwExLpZN64lQO9KirqNLe/EJ043EDHpc8Kton2gUfqshaKy2MWhZ Q9Jwkq7k2ENHzaaUzE8jUlaTMNm0+0/FH1j+v66Wg99amY+ZaWqRVI1BHmyRYIvvtoiY bW3A== X-Gm-Message-State: APf1xPD8CeRFOm1cLb9dAa7wNuSI1OvRpJqwPGgc8LcRAYfL2RzVuvO4 vg4OJ28D2F3bQcbuDGK5YCvjXQ== X-Received: by 10.36.94.197 with SMTP id h188mr7474236itb.141.1519298371260; Thu, 22 Feb 2018 03:19:31 -0800 (PST) Received: from linaro.org ([121.95.100.191]) by smtp.googlemail.com with ESMTPSA id b185sm211689itb.20.2018.02.22.03.19.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 22 Feb 2018 03:19:30 -0800 (PST) From: AKASHI Takahiro To: catalin.marinas@arm.com, will.deacon@arm.com, bauerman@linux.vnet.ibm.com, dhowells@redhat.com, vgoyal@redhat.com, herbert@gondor.apana.org.au, davem@davemloft.net, akpm@linux-foundation.org, mpe@ellerman.id.au, dyoung@redhat.com, bhe@redhat.com, arnd@arndb.de, ard.biesheuvel@linaro.org, julien.thierry@arm.com Cc: kexec@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, AKASHI Takahiro Subject: [PATCH v8 07/13] arm64: kexec_file: invoke the kernel without purgatory Date: Thu, 22 Feb 2018 20:17:26 +0900 Message-Id: <20180222111732.23051-8-takahiro.akashi@linaro.org> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180222111732.23051-1-takahiro.akashi@linaro.org> References: <20180222111732.23051-1-takahiro.akashi@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On arm64, purugatory would do almosty nothing. So just invoke the second kernel by jumping into the entry code directly. While, in this case, cpu_soft_restart() must be called in a specific way, it still stays compatible with kexec as far as the fifth argument is null. Signed-off-by: AKASHI Takahiro Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/kernel/cpu-reset.S | 6 +++--- arch/arm64/kernel/machine_kexec.c | 11 +++++++++-- arch/arm64/kernel/relocate_kernel.S | 3 ++- 3 files changed, 14 insertions(+), 6 deletions(-) -- 2.16.2 diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S index 8021b46c9743..46fd9ea66ae8 100644 --- a/arch/arm64/kernel/cpu-reset.S +++ b/arch/arm64/kernel/cpu-reset.S @@ -24,9 +24,9 @@ * * @el2_switch: Flag to indicate a swich to EL2 is needed. * @entry: Location to jump to for soft reset. - * arg0: First argument passed to @entry. - * arg1: Second argument passed to @entry. - * arg2: Third argument passed to @entry. + * arg0: First argument passed to @entry. (rellocator's address) + * arg1: Second argument passed to @entry.(physcal kernel entry) + * arg2: Third argument passed to @entry. (physical dtb address) * * Put the CPU into the same state as it would be if it had been reset, and * branch to what would be the reset vector. It must be executed with the diff --git a/arch/arm64/kernel/machine_kexec.c b/arch/arm64/kernel/machine_kexec.c index f76ea92dff91..f7dbba00be10 100644 --- a/arch/arm64/kernel/machine_kexec.c +++ b/arch/arm64/kernel/machine_kexec.c @@ -205,10 +205,17 @@ void machine_kexec(struct kimage *kimage) * uses physical addressing to relocate the new image to its final * position and transfers control to the image entry point when the * relocation is complete. + * In case of kexec_file_load syscall, we directly start the kernel, + * skipping purgatory. */ - cpu_soft_restart(kimage != kexec_crash_image, - reboot_code_buffer_phys, kimage->head, kimage->start, 0); + reboot_code_buffer_phys, kimage->head, kimage->start, +#ifdef CONFIG_KEXEC_FILE + kimage->purgatory_info.purgatory_buf ? + 0 : kimage->arch.dtb_mem); +#else + 0); +#endif BUG(); /* Should never get here. */ } diff --git a/arch/arm64/kernel/relocate_kernel.S b/arch/arm64/kernel/relocate_kernel.S index f407e422a720..95fd94209aae 100644 --- a/arch/arm64/kernel/relocate_kernel.S +++ b/arch/arm64/kernel/relocate_kernel.S @@ -32,6 +32,7 @@ ENTRY(arm64_relocate_new_kernel) /* Setup the list loop variables. */ + mov x18, x2 /* x18 = dtb address */ mov x17, x1 /* x17 = kimage_start */ mov x16, x0 /* x16 = kimage_head */ raw_dcache_line_size x15, x0 /* x15 = dcache line size */ @@ -107,7 +108,7 @@ ENTRY(arm64_relocate_new_kernel) isb /* Start new image. */ - mov x0, xzr + mov x0, x18 mov x1, xzr mov x2, xzr mov x3, xzr