From patchwork Mon Feb 19 11:21:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 128795 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp3386182ljc; Mon, 19 Feb 2018 03:22:05 -0800 (PST) X-Google-Smtp-Source: AH8x225yXuWOiuHkhXYo9t/pQX0oMxybv8I+U4lqmf8kC3YrTbwB8f0DBASKzkwgOadnHODQpwFQ X-Received: by 10.99.64.196 with SMTP id n187mr12013614pga.147.1519039325185; Mon, 19 Feb 2018 03:22:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1519039325; cv=none; d=google.com; s=arc-20160816; b=AVfv1IAbzJjPcAX53UdLFlu0gPc/5gl8xKo8oTlcOU8Yso1HwnRbBrtxfzrwOnkGVd 3yMCtH514H7bwrT0yE9qfoEYGHdq6T7o9TnBrHCaAhxips8ANCeMi03KNCWEhJLNh+l5 LV40Pt1vtGQd7GZ2CAgvapeMi6g9sEERBxgFWzGKrPDvZXA/LbwY84qoKBV2EClwcWZq QTnC1kJWLbNQKS3Y0q3giVolIohOu2Xz1eluRbyPJpGYijiQqy1bOmO3PhMdZPGODHeD CDbmsLEhjFHW2liB3XO55PBKc3i/3MfRn3efmNMMHt1p4cuQCsORPKIn2J3WrvA2g6AM 6KNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=6SqpLEXOLtsG1f9ZULMpEYu8xpXUYCxF0mctu1pVNf0=; b=maWjqXYnikAr8E9nmxC4C2WJtJnQeK/biTGX/fn+1lsR6fuNQY1iW294qP1SPd63xT ezUv8I2aptG2NfDCLxrd8QE6iYNfPMSS/ANkK7sJt/YSXQewh7DcFqO7JQSYq849SYb0 RgI3bJ1MNq9t9dXVo08n5R3wywkV1dr2o5Y3xFpTUiT6tgs9dnx6Y6azw/RSvP85khSa lvtZ55s99rXgNoYM0UbT/8FrkrwEzKWs1yH3WKcqOguuHCtgtY1aGRehKin9CmWcWimm nqcFiTNkJbRsGDA55DuW+XLbuxm67W5rMH5vDa9a4KmbagKfKNeOe3AZ+q/eBeXEgYed nAEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=Js2hlDrp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u25si8268689pge.113.2018.02.19.03.22.04; Mon, 19 Feb 2018 03:22:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=Js2hlDrp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752635AbeBSLV6 (ORCPT + 28 others); Mon, 19 Feb 2018 06:21:58 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:52088 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752592AbeBSLVy (ORCPT ); Mon, 19 Feb 2018 06:21:54 -0500 Received: by mail-wm0-f65.google.com with SMTP id h21so7102410wmd.1 for ; Mon, 19 Feb 2018 03:21:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6SqpLEXOLtsG1f9ZULMpEYu8xpXUYCxF0mctu1pVNf0=; b=Js2hlDrpXET/Sza3kasENsnS0/X2mJm/QQWLvhLLuf/yfulmFi7Hy2j8qUzh6R9vQm 4uZE5Cxu6LkBU+IATiTnQHZl457RtnvBBXCQ5sis+T1yYZ77qyo/LBeiJh/KvHCNV+vU mdMZSTMubl50oHBaXdQLL1g/ygCi82vXw+MNpq9LGc4r49WOnQjYquBbafOObXq/p0RW 3hrV1pQGHEid6wskHMOuhZD5uSQVxf320IxDbIB02gqDdOKfB3G31Vle6nnxio9FmGHS LKUNSk/wLV6T/CZkcTWulQgxvqJTdAL9kDGTOccUfDkZJU0artOrEWJ6S4Rt14EBnOF4 aaDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6SqpLEXOLtsG1f9ZULMpEYu8xpXUYCxF0mctu1pVNf0=; b=EOmeUntfiNU/wXnUC7dhCOKju/swjG7ltOD0AafZsm1PW8SEUcEHSjApzKJmqOVXjQ +GIdAsyht3cedxGoZsQZpYL++v7wPJ6+WQ7S/EPn0ACQSWa1vZmCZ94VzD2H9S3eg/Gw L57x3+0UsNGNvQ04O5yIlVHG4jfIDDzSRFT4U5toWPriV0WADmWvSutMSR6YwVSHayMK 5M624/lH5kzFzDzZsb8FSF6l/ooV2w+avRhj1ENBg2sKBykMSlUX+QN59X0+KdhqKGF+ wHkCQ4ibY5/RlAqpE2njrzbV6iyoW32zsP6TV9dR0JCZ4lh8c4TC8cSQVFlDvWwVmcVc GF9w== X-Gm-Message-State: APf1xPAdpPm9cSerHcohiTy+sw/Bi9/ifhdBh0s0mTgUxyLNP0di6aMe VLi6kVYfMc0iwgRhYW4mRnbCZw== X-Received: by 10.28.122.12 with SMTP id v12mr10038582wmc.66.1519039313122; Mon, 19 Feb 2018 03:21:53 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id n20sm8933978wrg.84.2018.02.19.03.21.52 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 19 Feb 2018 03:21:52 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Kevin Hilman Cc: Jerome Brunet , Stephen Boyd , Michael Turquette , Carlo Caione , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 02/11] clk: meson: poke pll CNTL last Date: Mon, 19 Feb 2018 12:21:37 +0100 Message-Id: <20180219112146.21746-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180219112146.21746-1-jbrunet@baylibre.com> References: <20180219112146.21746-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Poking CNTL first may take the PLL out of reset while we are still applying the initial settings, including the filter values initialization. This is the case for the axg and gxl gp0 pll. Doing this poke last ensures the pll stays in reset while the initial settings are applied. Signed-off-by: Jerome Brunet --- drivers/clk/meson/axg.c | 2 +- drivers/clk/meson/gxbb.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) -- 2.14.3 diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c index acb63c8e0fd8..8226b82c67fd 100644 --- a/drivers/clk/meson/axg.c +++ b/drivers/clk/meson/axg.c @@ -193,12 +193,12 @@ static const struct pll_rate_table axg_gp0_pll_rate_table[] = { }; const struct reg_sequence axg_gp0_init_regs[] = { - { .reg = HHI_GP0_PLL_CNTL, .def = 0x40010250 }, { .reg = HHI_GP0_PLL_CNTL1, .def = 0xc084a000 }, { .reg = HHI_GP0_PLL_CNTL2, .def = 0xb75020be }, { .reg = HHI_GP0_PLL_CNTL3, .def = 0x0a59a288 }, { .reg = HHI_GP0_PLL_CNTL4, .def = 0xc000004d }, { .reg = HHI_GP0_PLL_CNTL5, .def = 0x00078000 }, + { .reg = HHI_GP0_PLL_CNTL, .def = 0x40010250 }, }; static struct clk_regmap axg_gp0_pll = { diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c index bb0b0529ca81..3cd07f960489 100644 --- a/drivers/clk/meson/gxbb.c +++ b/drivers/clk/meson/gxbb.c @@ -390,10 +390,10 @@ static struct clk_regmap gxbb_sys_pll = { }; const struct reg_sequence gxbb_gp0_init_regs[] = { - { .reg = HHI_GP0_PLL_CNTL, .def = 0x6a000228 }, { .reg = HHI_GP0_PLL_CNTL2, .def = 0x69c80000 }, { .reg = HHI_GP0_PLL_CNTL3, .def = 0x0a5590c4 }, { .reg = HHI_GP0_PLL_CNTL4, .def = 0x0000500d }, + { .reg = HHI_GP0_PLL_CNTL, .def = 0x4a000228 }, }; static struct clk_regmap gxbb_gp0_pll = { @@ -437,12 +437,12 @@ static struct clk_regmap gxbb_gp0_pll = { }; const struct reg_sequence gxl_gp0_init_regs[] = { - { .reg = HHI_GP0_PLL_CNTL, .def = 0x40010250 }, { .reg = HHI_GP0_PLL_CNTL1, .def = 0xc084a000 }, { .reg = HHI_GP0_PLL_CNTL2, .def = 0xb75020be }, { .reg = HHI_GP0_PLL_CNTL3, .def = 0x0a59a288 }, { .reg = HHI_GP0_PLL_CNTL4, .def = 0xc000004d }, { .reg = HHI_GP0_PLL_CNTL5, .def = 0x00078000 }, + { .reg = HHI_GP0_PLL_CNTL, .def = 0x40010250 }, }; static struct clk_regmap gxl_gp0_pll = {