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[209.132.180.67]) by mx.google.com with ESMTP id d8-v6si2475757pli.337.2018.02.12.05.37.23; Mon, 12 Feb 2018 05:37:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=uQ4HkBcd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935567AbeBLNhT (ORCPT + 14 others); Mon, 12 Feb 2018 08:37:19 -0500 Received: from mail-wr0-f195.google.com ([209.85.128.195]:43914 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S935552AbeBLNhQ (ORCPT ); Mon, 12 Feb 2018 08:37:16 -0500 Received: by mail-wr0-f195.google.com with SMTP id b52so15188240wrd.10 for ; Mon, 12 Feb 2018 05:37:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=D1VMAlsW8EJJ+jAueeZ79UjBc9AQzPkx1fMq6JcjzhY=; b=uQ4HkBcdQ79KrZH2tXXBIqXSFzS9W8dtBKws/cIjqySCM8rQ9ILHXL+mN0imx0a71Y sxVB+YfDNXPZy+eTmwmHU1VCebJL3q+kUDo2/GpTzKBWql1WHowQNyKNVegv+2sZFUHD UGGK+uj0P2M/ivkjVFkCqxCT9PXgGdN6VrOX2xmh/og/EqVrqU1hblB/SWgo1y+rhng2 DBK8sdLK/u8/9G00DfYczAw5SfpR5hSxnpUSQNRiY4Q1YRMn8KQOeTnueM1yHPMeANjK l3MPNCH89XlLbRvpsd/2GYQJGqakNKxF90aVBMl8LCCNhj8V7OYqAxue0XxyKbNU6fo6 j/hw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=D1VMAlsW8EJJ+jAueeZ79UjBc9AQzPkx1fMq6JcjzhY=; b=LF9QtZjUdOIrG8XIoXLbwsmOTOZRnI8DrwmzFWw1YWSu1IperDghfxu9DvKBjFxHW5 WVZb5QAR84qW7M+qH3zqVy+9GtYZWu3OzsgnXQ3zihh6w5mErT4j3qprOySiYMfbyZox lcHfK8MBm2nw4WHcL58LlzWcfngtJNrgtVkBeeb5pALV9gfL9sqkeyEpbeLmwO0HGTD4 x4UfsnZTJumuQTMp21y/sA6FGurP0gMSKpyztNPiP0FoMG/8sipZTbqFlljP0C6O0rBm RDOo5pu5K5MUrgJpP1x/1xXCaMEHkJbxtpK1jCNKvFn0XzwnNjOT8OHKLdL/Q7qguVde y1ng== X-Gm-Message-State: APf1xPCZOfQipl1tZKq1rYKW/V9mPqPMbBTRjKxZCD2EUTPYLrw7YlY+ 2PlVUJHE2lveCLY2OvQVer/Rk3+D X-Received: by 10.223.139.68 with SMTP id v4mr3703346wra.157.1518442635135; Mon, 12 Feb 2018 05:37:15 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id r1sm6380123wmg.22.2018.02.12.05.37.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 12 Feb 2018 05:37:14 -0800 (PST) From: Jerome Brunet To: Stephen Boyd , Michael Turquette Cc: Jerome Brunet , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong Subject: [PATCH] clk: fix mux clock documentation Date: Mon, 12 Feb 2018 14:37:12 +0100 Message-Id: <20180212133712.15132-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The mux documentation mentions the non-existing parameter width instead of mask. Just sed this. Fixes: 9d9f78ed9af0 ("clk: basic clock hardware types") Signed-off-by: Jerome Brunet --- include/linux/clk-provider.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.14.3 diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index b3210c431e33..210a890008f9 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -456,7 +456,7 @@ void clk_hw_unregister_divider(struct clk_hw *hw); * @reg: register controlling multiplexer * @table: array of register values corresponding to the parent index * @shift: shift to multiplexer bit field - * @width: width of mutliplexer bit field + * @mask: mask of mutliplexer bit field * @flags: hardware-specific flags * @lock: register lock *