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[209.132.180.67]) by mx.google.com with ESMTP id e17si1797231pgo.189.2018.01.31.10.10.24; Wed, 31 Jan 2018 10:10:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=wUsKODBD; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753919AbeAaSKY (ORCPT + 28 others); Wed, 31 Jan 2018 13:10:24 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:37780 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753881AbeAaSKL (ORCPT ); Wed, 31 Jan 2018 13:10:11 -0500 Received: by mail-wm0-f67.google.com with SMTP id v71so811031wmv.2 for ; Wed, 31 Jan 2018 10:10:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pA/l753Clohi2etsvUOL73GFxfOVooDosfGEhU+JF1Q=; b=wUsKODBDDAym+F+L07LWUDkDtvLkpAe+0FmD2nxqcrIUO3OX/MTYirHBnZKfqmLYR4 kPpKUQ8WOOpib2X3mfgHIdLF/giV6/Hsu3PwuGAv8lSHGaibyAHNwlqri00K6OZROp5v Arwtfe3KY+trwHR3nC7FH2U/kMPw+ud/R4BX4gdpz0Q7OV9ZCaTtSFM+uc6QZDrctb3A /W3t+HC4Obtv57dwef1tDhwyBBSbG9IrdaPmux9yvnx02tGonwXGxtuhRetRDSdrbJRl aVhUokpJdlOFWWJi3WTdwMVjyH+bQV4MSxlGNH/7vpGsrWpnzfVc6g0xqfJsquDDLVF0 5YQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pA/l753Clohi2etsvUOL73GFxfOVooDosfGEhU+JF1Q=; b=rVa63PQanIGVJYVLhAVdfcv6zcV+9DwauDhDIqNUrBKQfq6qvNozmNhr4NrzigGAZE xJT2suYvur1iLBZ3ivCgUuI6QYGXGB/k2TCX3Hnm3wmeeguD5NC2BKhbnteMi1OMTJfD PFXMcncxcYF8Zkb7OYqHQVDHy6p3bbxairVQA8OJ3wSqYYDTGOLu6ecTHY6U7oXzGVtK GfZ1XMOtzvEglORJoiK/J7DBIhFBaj9Z5wBYq5CWLaLIoMsVVIQblB3W/NaHeTKll5ua CYLcVEaG/EHkedRJiEgZUcmOcA9AKxWucnoVWEBgqStzD+6lV2QFSG+6LRfpgtjhyt0G 2qcQ== X-Gm-Message-State: AKwxytclzJse8cwrNmw8N0Ai1prtiTNHmapLol1zAGVpkrdkBWJ9S+gq XJIQBqkRkNFAlop0cQtO7jnvOA== X-Received: by 10.28.141.212 with SMTP id p203mr16147754wmd.39.1517422209679; Wed, 31 Jan 2018 10:10:09 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id f8sm341977wmc.3.2018.01.31.10.10.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 31 Jan 2018 10:10:09 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Kevin Hilman Cc: Jerome Brunet , Stephen Boyd , Michael Turquette , Carlo Caione , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 19/19] clk: meson: use hhi syscon if available Date: Wed, 31 Jan 2018 19:09:45 +0100 Message-Id: <20180131180945.18025-20-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180131180945.18025-1-jbrunet@baylibre.com> References: <20180131180945.18025-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On gxbb and axg, try to get the hhi regmap from the parent DT node, which should be the HHI system controller once the necessary changes have been made in amlogic's DTs Until then, if getting regmap through the system controller fails, the clock controller will fall back to the old way, requesting memory region directly and then registering the regmap itself. This should allow a smooth transition to syscon Signed-off-by: Jerome Brunet --- drivers/clk/meson/Kconfig | 2 ++ drivers/clk/meson/axg.c | 43 ++++++++++++++++++++++++++++++------------- drivers/clk/meson/gxbb.c | 39 ++++++++++++++++++++++++++++----------- 3 files changed, 60 insertions(+), 24 deletions(-) -- 2.14.3 diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index 936afddae406..d5cbec522aec 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -22,6 +22,7 @@ config COMMON_CLK_GXBB depends on COMMON_CLK_AMLOGIC select RESET_CONTROLLER select COMMON_CLK_REGMAP_MESON + select MFD_SYSCON help Support for the clock controller on AmLogic S905 devices, aka gxbb. Say Y if you want peripherals and CPU frequency scaling to work. @@ -31,6 +32,7 @@ config COMMON_CLK_AXG depends on COMMON_CLK_AMLOGIC select RESET_CONTROLLER select COMMON_CLK_REGMAP_MESON + select MFD_SYSCON help Support for the clock controller on AmLogic A113D devices, aka axg. Say Y if you want peripherals and CPU frequency scaling to work. diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c index ae1dd35246f5..8c455f8c1d91 100644 --- a/drivers/clk/meson/axg.c +++ b/drivers/clk/meson/axg.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -850,25 +851,41 @@ static int axg_clkc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct resource *res; - void __iomem *clk_base; + void __iomem *clk_base = NULL; struct regmap *map; int ret, i; - /* Generic clocks and PLLs */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -EINVAL; + /* Get the hhi system controller node if available */ + map = syscon_node_to_regmap(of_get_parent(dev->of_node)); + if (IS_ERR(map)) { + dev_err(dev, + "failed to get HHI regmap - Trying obsolete regs\n"); + + /* + * FIXME: HHI registers should be accessed through + * the appropriate system controller. This is required because + * there is more than just clocks in this register space + * + * This fallback method is only provided temporarily until + * all the platform DTs are properly using the syscon node + */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -EINVAL; + + + clk_base = devm_ioremap(dev, res->start, resource_size(res)); + if (!clk_base) { + dev_err(dev, "Unable to map clk base\n"); + return -ENXIO; + } - clk_base = devm_ioremap(dev, res->start, resource_size(res)); - if (!clk_base) { - dev_err(dev, "Unable to map clk base\n"); - return -ENXIO; + map = devm_regmap_init_mmio(dev, clk_base, + &clkc_regmap_config); + if (IS_ERR(map)) + return PTR_ERR(map); } - map = devm_regmap_init_mmio(dev, clk_base, &clkc_regmap_config); - if (IS_ERR(map)) - return PTR_ERR(map); - /* Populate regmap for the regmap backed clocks */ for (i = 0; i < ARRAY_SIZE(axg_clk_regmaps); i++) axg_clk_regmaps[i]->map = map; diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c index 92403ab2daf5..f9acd4015a1c 100644 --- a/drivers/clk/meson/gxbb.c +++ b/drivers/clk/meson/gxbb.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -2042,19 +2043,35 @@ static int gxbb_clkc_probe(struct platform_device *pdev) if (!clkc_data) return -EINVAL; - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -EINVAL; + /* Get the hhi system controller node if available */ + map = syscon_node_to_regmap(of_get_parent(dev->of_node)); + if (IS_ERR(map)) { + dev_err(dev, + "failed to get HHI regmap - Trying obsolete regs\n"); - clk_base = devm_ioremap(dev, res->start, resource_size(res)); - if (!clk_base) { - pr_err("%s: Unable to map clk base\n", __func__); - return -ENXIO; - } + /* + * FIXME: HHI registers should be accessed through + * the appropriate system controller. This is required because + * there is more than just clocks in this register space + * + * This fallback method is only provided temporarily until + * all the platform DTs are properly using the syscon node + */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -EINVAL; + + clk_base = devm_ioremap(dev, res->start, resource_size(res)); + if (!clk_base) { + dev_err(dev, "Unable to map clk base\n"); + return -ENXIO; + } - map = devm_regmap_init_mmio(dev, clk_base, &clkc_regmap_config); - if (IS_ERR(map)) - return PTR_ERR(map); + map = devm_regmap_init_mmio(dev, clk_base, + &clkc_regmap_config); + if (IS_ERR(map)) + return PTR_ERR(map); + } /* Populate regmap for the common regmap backed clocks */ for (i = 0; i < ARRAY_SIZE(gx_clk_regmaps); i++)