From patchwork Thu Jan 18 11:01:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 124931 Delivered-To: patch@linaro.org Received: by 10.46.64.27 with SMTP id n27csp76639lja; Thu, 18 Jan 2018 03:02:07 -0800 (PST) X-Google-Smtp-Source: ACJfBouuLDZJG6GsD3SSYlh3QkugfCBy52G2RndAL8EhH2K+JTc3wDD2IHOVpv0YNHZO3ZBz3tWk X-Received: by 10.98.137.197 with SMTP id n66mr12652243pfk.70.1516273327753; Thu, 18 Jan 2018 03:02:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516273327; cv=none; d=google.com; s=arc-20160816; b=SPPjl/5byRgCLDp/uUmZDZKvM0S7kek8k815miiMPryVGr0VH3in2U9TyFa+s0cdUE mttzUC3R5I3TEMVm3afqnjVfNd9B/ZtyMUjcNToqWeqUzpztJI8oYnetrKwkrjwRyi+s JQuy7p3LM2o+tpCpI2PJUxiDqxikqTyehi6yioTwstTwy35XBYhItOEBw+IZgXaYQnjo HuQdWSe348FcimtP9IVSaMl9kUWuP/xHxLgWoWaI4kZplVNFK2T1p/wbXOrxr5qmhf3t O7FV5EgsDKOmA5wB3+EE34KbUpGHuvLPECTQPwDv3lGNiTDddsQqh+DK8Uz9pXhCugdc J/qw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=tFMAcGZcm5MWfA5tnx3IgxsgNuEFw+dSE+4f1jLMBcw=; b=nb7Hc/5RrpjBsNwk3SdWOeKtUygiUgXjDhYvJ3KG/tvCEYmyOBt6m33ehpR8do0iIK 92iAYUzgeZOMCCYyaDI623aeCFnDfmcsoxTxBhOqAHaGDSAZo4a0NFL9MtdrcdlzyC+n fou2jRYhm/oQtceE/aMPZxtEgk9qC71LaFtIKL+daz6O747hht5Ijhs5s3dyyYTDLPgg mHl2mYSqYpIlxLYQpvypLZPHpwb8lQ2QLZqHJuhTsEzx4GsEswOcoNNdGIuzuI/ryz4O +2iIAHaN9qHyTko32kDwg4FdKjQ1qHHE3ogA2HvzlosPMEfqju4onG3gnj/bdLxFXVMB wsHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=UnsZz9OS; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m12si6213095pls.389.2018.01.18.03.02.07; Thu, 18 Jan 2018 03:02:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=UnsZz9OS; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755267AbeARLCD (ORCPT + 28 others); Thu, 18 Jan 2018 06:02:03 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:35354 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754951AbeARLCA (ORCPT ); Thu, 18 Jan 2018 06:02:00 -0500 Received: by mail-wm0-f67.google.com with SMTP id r78so22028279wme.0 for ; Thu, 18 Jan 2018 03:01:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tFMAcGZcm5MWfA5tnx3IgxsgNuEFw+dSE+4f1jLMBcw=; b=UnsZz9OS7PALYjy+DzdMoqkdD2syhaPmxjyM4/AwUygZ/oEIzt5zqE7fr9ZRjIs7Bf gZVyk8lYJtH6XHWTW/llNpw8bcIS8XvYY86RbVBjMNEKisSb8Ploxe2TKHV5jDUsB0jb 8W5M0WEZQ4E5j2nqY1nExndYtHTmb9JOin8qkGawr8INOvt3h3GCmYvl6vivHNnWqs/p j30pSoV/Fbk7bSRZQVmbuqTgNIOmgQrZ3meZjYmEeIItWbOZLm4PG7y/SXEuUumqjlEW xh2ItjeUGbY+J+NQ3erq1h+BifWqb9jGsNSXHnnqTzByym6WTXgy+P7npj9w7xjnmeVV KvJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tFMAcGZcm5MWfA5tnx3IgxsgNuEFw+dSE+4f1jLMBcw=; b=LCRvaUxpywtwWrEh3fpn9On8bAS8+Fi+DajGC9tcobltStEETwg6m/yNxwQCUkGD8K 5oBL/iSlfE/oSpPOxfow5ObK1VGpL2Uh5xeGw4F+z9C1oK2M+48DL79toTRV8XOFkS/M Puiu8nsV21QCsUoi5Gxq7d/AXNUdLApTcEcPe2UWYf7W5M9paxPvvQu23L+PTRp2F0rC +1cuDy693hgaUA7c8DIWUdnb8FcmTm/z8y8alZ4reHc4c8XiMQlL+z/x0mGghqeg2vBm 0VhVX22s/bxTPh8vhO4XiWEL9nbCls9ZbVY7VpFB9ZelZ4l8D+f+CuP7Z5T70A2S9Q/W 8wSg== X-Gm-Message-State: AKwxytc68DrqWsdaoDTx9/AN/GxNKeRfdoXcIfB+L/XVDYAP7jogdNXk oQOMs39soph8HELQXI9OV4iOOQ== X-Received: by 10.28.21.73 with SMTP id 70mr4477094wmv.152.1516273318976; Thu, 18 Jan 2018 03:01:58 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id k125sm19972075wmd.48.2018.01.18.03.01.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 18 Jan 2018 03:01:58 -0800 (PST) From: Jerome Brunet To: Stephen Boyd , Michael Turquette Cc: Jerome Brunet , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/2] clk: mux: add helper function for index/value translation Date: Thu, 18 Jan 2018 12:01:44 +0100 Message-Id: <20180118110144.30619-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180118110144.30619-1-jbrunet@baylibre.com> References: <20180118110144.30619-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add helper functions for the translation between parent index and register value in the generic multiplexer function. The purpose of this change is avoid duplicating the code in other clock providers, using the same generic logic. Signed-off-by: Jerome Brunet --- drivers/clk/clk-mux.c | 75 +++++++++++++++++++++++++------------------- include/linux/clk-provider.h | 4 +++ 2 files changed, 47 insertions(+), 32 deletions(-) -- 2.14.3 diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 39cabe157163..ac4a042f8658 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -26,35 +26,24 @@ * parent - parent is adjustable through clk_set_parent */ -static u8 clk_mux_get_parent(struct clk_hw *hw) +int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags, + unsigned int val) { - struct clk_mux *mux = to_clk_mux(hw); int num_parents = clk_hw_get_num_parents(hw); - u32 val; - /* - * FIXME need a mux-specific flag to determine if val is bitwise or numeric - * e.g. sys_clkin_ck's clksel field is 3 bits wide, but ranges from 0x1 - * to 0x7 (index starts at one) - * OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so - * val = 0x4 really means "bit 2, index starts at bit 0" - */ - val = clk_readl(mux->reg) >> mux->shift; - val &= mux->mask; - - if (mux->table) { + if (table) { int i; for (i = 0; i < num_parents; i++) - if (mux->table[i] == val) + if (table[i] == val) return i; return -EINVAL; } - if (val && (mux->flags & CLK_MUX_INDEX_BIT)) + if (val && (flags & CLK_MUX_INDEX_BIT)) val = ffs(val) - 1; - if (val && (mux->flags & CLK_MUX_INDEX_ONE)) + if (val && (flags & CLK_MUX_INDEX_ONE)) val--; if (val >= num_parents) @@ -62,36 +51,58 @@ static u8 clk_mux_get_parent(struct clk_hw *hw) return val; } +EXPORT_SYMBOL_GPL(clk_mux_val_to_index); -static int clk_mux_set_parent(struct clk_hw *hw, u8 index) +unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index) { - struct clk_mux *mux = to_clk_mux(hw); - u32 val; - unsigned long flags = 0; + unsigned int val = index; - if (mux->table) { - index = mux->table[index]; + if (table) { + val = table[index]; } else { - if (mux->flags & CLK_MUX_INDEX_BIT) - index = 1 << index; + if (flags & CLK_MUX_INDEX_BIT) + val = 1 << index; - if (mux->flags & CLK_MUX_INDEX_ONE) - index++; + if (flags & CLK_MUX_INDEX_ONE) + val++; } + return val; +} +EXPORT_SYMBOL_GPL(clk_mux_index_to_val); + +static u8 clk_mux_get_parent(struct clk_hw *hw) +{ + struct clk_mux *mux = to_clk_mux(hw); + u32 val; + + val = clk_readl(mux->reg) >> mux->shift; + val &= mux->mask; + + return clk_mux_val_to_index(hw, mux->table, mux->flags, val); +} + +static int clk_mux_set_parent(struct clk_hw *hw, u8 index) +{ + struct clk_mux *mux = to_clk_mux(hw); + u32 val = clk_mux_index_to_val(mux->table, mux->flags, index); + unsigned long flags = 0; + u32 reg; + if (mux->lock) spin_lock_irqsave(mux->lock, flags); else __acquire(mux->lock); if (mux->flags & CLK_MUX_HIWORD_MASK) { - val = mux->mask << (mux->shift + 16); + reg = mux->mask << (mux->shift + 16); } else { - val = clk_readl(mux->reg); - val &= ~(mux->mask << mux->shift); + reg = clk_readl(mux->reg); + reg &= ~(mux->mask << mux->shift); } - val |= index << mux->shift; - clk_writel(val, mux->reg); + val = val << mux->shift; + reg |= val; + clk_writel(reg, mux->reg); if (mux->lock) spin_unlock_irqrestore(mux->lock, flags); diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 38861e75b017..cf3bf8aabced 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -514,6 +514,10 @@ struct clk_hw *clk_hw_register_mux_table(struct device *dev, const char *name, void __iomem *reg, u8 shift, u32 mask, u8 clk_mux_flags, u32 *table, spinlock_t *lock); +int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags, + unsigned int val); +unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index); + void clk_unregister_mux(struct clk *clk); void clk_hw_unregister_mux(struct clk_hw *hw);