From patchwork Wed Jan 3 22:38:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 123361 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp10722732qgn; Wed, 3 Jan 2018 14:39:13 -0800 (PST) X-Google-Smtp-Source: ACJfBot2Dc7JYHJ9XoWg7NuHuRjifTFulGkxi3ZwYkuM7gd16ZykssBpxZlZYHopn+KdCoAxtaqY X-Received: by 10.84.143.70 with SMTP id 64mr2711171ply.277.1515019153610; Wed, 03 Jan 2018 14:39:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1515019153; cv=none; d=google.com; s=arc-20160816; b=v81rwPITlWk5RCMccXPvKDxnnAOJFScsdZRlWPaVwXgxoZ+R5EdXGJVKdilj2uUE0C ihuyk52uM6dzwNC4ZHG0U/sdGUA8DCiDrhLPsSmBInb+byb1txagcKzw2PFRE8Co8x79 B0KurKimoqvAlNP0bAL+7IaU5f0mxubmZWJ6uPRhdTTMAzgOSEoZWdRLuz31baDPu/j7 sLnAhkes1YqPdBgQuDVjOWS1HjYapJQrjRHLyNG1crNC8NZIvwO+wnl/9wrc62o7w1i2 qNYTXAvnYww7VFbkPbY0WYcZFL6CkCNFtzd131BkfGkZDQ5kLU0TMhf0P2eNYfcaD9s/ gr6A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=bNqK77d6y+pOSHFNdx0aabB6V5rfZW85vv/sPI/2NEw=; b=pqKP//cxZZ8l0UGa7/9acsX9WlgFY6faL1c+0kK6+EM4P7nKoXoC8Sm5IgUmaSNjfB /HS/BpX6d2JUpp6i42togQhgcE5kQ8D86fOWOlF4mkMjsrd7s1rNdVUuggmQ9M6lgiV2 vDvesca/a7wsuQvxQy3L1FUHWjXwlxq5ckuiTgyYdCyJkgT9GmSUQC8eH66Pb9gElPfg kOPyr070LahswsMpDdQHJEW7gWhc/trUvaqVwUStwA1hT6jqvGcawdS8c13OxvyA/n/J QIDFsKlcmB4IeLoN8hbyWxcPEySGUFLT52qnTO+aZ+Da27iA63+KqOCWTAajduTTVwT2 +hHA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k135si1193854pgc.32.2018.01.03.14.39.13; Wed, 03 Jan 2018 14:39:13 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751505AbeACWjJ (ORCPT + 28 others); Wed, 3 Jan 2018 17:39:09 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:55510 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751078AbeACWil (ORCPT ); Wed, 3 Jan 2018 17:38:41 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C8C1E1596; Wed, 3 Jan 2018 14:38:40 -0800 (PST) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DD9813F24A; Wed, 3 Jan 2018 14:38:39 -0800 (PST) From: Mark Rutland To: linux-kernel@vger.kernel.org Cc: linux-arch@vger.kernel.org, Mark Rutland , Will Deacon Subject: [RFC PATCH 3/4] arm64: implement nospec_{load,ptr}() Date: Wed, 3 Jan 2018 22:38:26 +0000 Message-Id: <20180103223827.39601-4-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180103223827.39601-1-mark.rutland@arm.com> References: <20180103223827.39601-1-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch implements nospec_load() and nospec_ptr() for arm64, following the recommended architectural sequence. Signed-off-by: Mark Rutland Signed-off-by: Will Deacon --- arch/arm64/include/asm/barrier.h | 61 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) -- 2.11.0 diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h index 77651c49ef44..5d17919e2688 100644 --- a/arch/arm64/include/asm/barrier.h +++ b/arch/arm64/include/asm/barrier.h @@ -40,6 +40,67 @@ #define dma_rmb() dmb(oshld) #define dma_wmb() dmb(oshst) +#define __load_no_speculate_n(ptr, lo, hi, failval, cmpptr, w, sz) \ +({ \ + typeof(*ptr) __nln_val; \ + typeof(*ptr) __failval = \ + (typeof(*ptr))(unsigned long)(failval); \ + \ + asm volatile ( \ + " cmp %[c], %[l]\n" \ + " ccmp %[c], %[h], 2, cs\n" \ + " b.cs 1f\n" \ + " ldr" #sz " %" #w "[v], %[p]\n" \ + "1: csel %" #w "[v], %" #w "[v], %" #w "[f], cc\n" \ + " hint #0x14 // CSDB\n" \ + : [v] "=&r" (__nln_val) \ + : [p] "m" (*(ptr)), [l] "r" (lo), [h] "r" (hi), \ + [f] "rZ" (__failval), [c] "r" (cmpptr) \ + : "cc"); \ + \ + __nln_val; \ +}) + +#define __load_no_speculate(ptr, lo, hi, failval, cmpptr) \ +({ \ + typeof(*(ptr)) __nl_val; \ + \ + switch (sizeof(__nl_val)) { \ + case 1: \ + __nl_val = __load_no_speculate_n(ptr, lo, hi, failval, \ + cmpptr, w, b); \ + break; \ + case 2: \ + __nl_val = __load_no_speculate_n(ptr, lo, hi, failval, \ + cmpptr, w, h); \ + break; \ + case 4: \ + __nl_val = __load_no_speculate_n(ptr, lo, hi, failval, \ + cmpptr, w, ); \ + break; \ + case 8: \ + __nl_val = __load_no_speculate_n(ptr, lo, hi, failval, \ + cmpptr, x, ); \ + break; \ + default: \ + BUILD_BUG(); \ + } \ + \ + __nl_val; \ +}) + +#define nospec_load(ptr, lo, hi) \ +({ \ + typeof(ptr) __nl_ptr = (ptr); \ + __load_no_speculate(__nl_ptr, lo, hi, 0, __nl_ptr); \ +}) + +#define nospec_ptr(ptr, lo, hi) \ +({ \ + typeof(ptr) __np_ptr = (ptr); \ + __load_no_speculate(&__np_ptr, lo, hi, 0, __np_ptr); \ +}) + #define __smp_mb() dmb(ish) #define __smp_rmb() dmb(ishld) #define __smp_wmb() dmb(ishst)