From patchwork Mon Dec 18 09:44:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 122199 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp2614039qgn; Mon, 18 Dec 2017 01:48:24 -0800 (PST) X-Google-Smtp-Source: ACJfBovLYoVX7RX9mIcjtS0MALOdLFu0ZPBeEKAGJEpRU6sn/Rz1UTBGAvafvg9AbDDe0gLJMWbg X-Received: by 10.84.129.7 with SMTP id 7mr6477672plb.104.1513590504089; Mon, 18 Dec 2017 01:48:24 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513590504; cv=none; d=google.com; s=arc-20160816; b=ZyOmPY9D3NwMDRUbWQY8TNMuPlGHCiVg38rxU9Bgje1N9AaN0vFKJIgBG0Ec9/ZakV qzs6Xmu57E3Z9Cec+6wbiBhAAvV6W11LZ/JfhxUi1sbBWlcT8yT3lXgmWOa5Ps4ZcDlp VS+YIFJak+ibSC+AG6FFeLnx8wjORf90736gBk7kCv/vU25NYO7IBKJ7+cVsJ2M5blDj 5VrzQlDM9XiV169K76/DNh5Bj6IIRNSkQWxcLtC4A+wmW+u7++urTBa/TWD1aECaRrg0 KY/r4zh43xDePhk7/Af8I44r7e7PCBWOxqPYTrSxys7GLlAQDeTEFKmn3QFknY36NFmz 6bQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=69M9Tk3sFtCpyNWDmoteGESV5/X+JnhQXIYqKSnGztU=; b=Za8D096vZWp+fKHl+tgasw51Hkh89nBDyBQxR2UHZcJ6fTvruo12P5+1AXCF6o8gDq VQqMzRYxJFQeprmUpUI4K+VCF3+0z45mYKebJDfL1uCNq7uv2rmzDKV7HPMU5zL7oYkK MLDBc9hdyqz5rBQ11d2XFEmeJBGlPDlY/P2Wg865daPCzFrh44WfBm11k+cHq7ZiqFqT e+Mje3SvMHh+vk9svSp/7Qs6ce/RJwwnEN7u+t2b0ZwzkZjuaGy9upS08ivkaYWrCCDg yCJNKaz2bZ0WaWL8Uv8+vHFEx11M23crx1lvAvvSvjGcUfdNdEm8N2cNWpEz5h1Orxd9 Z3Yw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=DC99hJIR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id bc11si8990898plb.84.2017.12.18.01.48.23; Mon, 18 Dec 2017 01:48:24 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=DC99hJIR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933751AbdLRJsR (ORCPT + 28 others); Mon, 18 Dec 2017 04:48:17 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:37997 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758384AbdLRJoy (ORCPT ); Mon, 18 Dec 2017 04:44:54 -0500 Received: by mail-wm0-f65.google.com with SMTP id 64so28048784wme.3 for ; Mon, 18 Dec 2017 01:44:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=69M9Tk3sFtCpyNWDmoteGESV5/X+JnhQXIYqKSnGztU=; b=DC99hJIRuj/R5QwZQfzwJIq7FKEOlxXQx871nUKdT2pk5PMZPqIfJk1qmQccKZWCGn 6DQDPFEvzJOpghs28NNEhqp296R5+j9ZtHZruVZQ/yAx5sOXWFhYJodiQRcF+BAPnScJ 6wdkDmnvjyNCU4ZW/gvUmgx79rK2lMBlQE/9b1n07JkxEpGO+EWWw9ac88njsIwZZOmc x+vm8EvuLyJikBBxoBX/gnkgglkr3nrGKqHVWS+8Zf0oWzG+hwErJ9Sm0dquJ8YIFez2 IbrKIopXmfb7tbPzX2FqUsPQZN8QXJf+DwR50Y7M4/shfi8bImbNjJl8zR0im+Vimwh2 jrFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=69M9Tk3sFtCpyNWDmoteGESV5/X+JnhQXIYqKSnGztU=; b=l10+ohNZBJ/bwQ6oixgZv2k1oA6Ju53YSkQ45nkp/k10EvDyJzIMTZEit//ZkCkz21 YlYh2WT0evb2qL3XzDIHpzqUp7dAIYCH8E2+tdQpM7e2EzHyly8k/QvC0SHD76Az4aN+ jYbvENv1FFTts4iPf11PP1GODjiFhdleTsnMhtSn+PQ14T5VaDdYfLYa0Lj03sOKA3IG uDreL76NGQqxRujHv0xmKKg0ncAlNi3KFgcIatpNj6YRIysuJ/B3CIIGlC0lt+TTWImH voMOJ7HLcwKlDiWAJL/ftaVtYiDwKjDR4fY4wqE/KGs15N0bDqjwASWFqZu0iNSSuBxA QAcQ== X-Gm-Message-State: AKGB3mIvNlw5xSwDeKOnXBvGhzeUJFGtzgs0mbning/v0XEvxklxryIm R9YIHFXmY7FYyK1XdmmI74gxEA== X-Received: by 10.28.170.75 with SMTP id t72mr10772808wme.15.1513590293402; Mon, 18 Dec 2017 01:44:53 -0800 (PST) Received: from boomer.baylibre.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id p13sm12820783wrc.61.2017.12.18.01.44.52 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Dec 2017 01:44:52 -0800 (PST) From: Jerome Brunet To: Andrew Lunn , Florian Fainelli Cc: Jerome Brunet , Kevin Hilman , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v3 1/7] net: phy: meson-gxl: check phy_write return value Date: Mon, 18 Dec 2017 10:44:40 +0100 Message-Id: <20171218094446.31912-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171218094446.31912-1-jbrunet@baylibre.com> References: <20171218094446.31912-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Always check phy_write return values. Better to be safe than sorry Reviewed-by: Andrew Lunn Signed-off-by: Jerome Brunet --- drivers/net/phy/meson-gxl.c | 50 ++++++++++++++++++++++++++++++++++----------- 1 file changed, 38 insertions(+), 12 deletions(-) -- 2.14.3 diff --git a/drivers/net/phy/meson-gxl.c b/drivers/net/phy/meson-gxl.c index 4ee630afe43a..900606204c0a 100644 --- a/drivers/net/phy/meson-gxl.c +++ b/drivers/net/phy/meson-gxl.c @@ -26,27 +26,53 @@ static int meson_gxl_config_init(struct phy_device *phydev) { + int ret; + /* Enable Analog and DSP register Bank access by */ - phy_write(phydev, 0x14, 0x0000); - phy_write(phydev, 0x14, 0x0400); - phy_write(phydev, 0x14, 0x0000); - phy_write(phydev, 0x14, 0x0400); + ret = phy_write(phydev, 0x14, 0x0000); + if (ret) + return ret; + ret = phy_write(phydev, 0x14, 0x0400); + if (ret) + return ret; + ret = phy_write(phydev, 0x14, 0x0000); + if (ret) + return ret; + ret = phy_write(phydev, 0x14, 0x0400); + if (ret) + return ret; /* Write Analog register 23 */ - phy_write(phydev, 0x17, 0x8E0D); - phy_write(phydev, 0x14, 0x4417); + ret = phy_write(phydev, 0x17, 0x8E0D); + if (ret) + return ret; + ret = phy_write(phydev, 0x14, 0x4417); + if (ret) + return ret; /* Enable fractional PLL */ - phy_write(phydev, 0x17, 0x0005); - phy_write(phydev, 0x14, 0x5C1B); + ret = phy_write(phydev, 0x17, 0x0005); + if (ret) + return ret; + ret = phy_write(phydev, 0x14, 0x5C1B); + if (ret) + return ret; /* Program fraction FR_PLL_DIV1 */ - phy_write(phydev, 0x17, 0x029A); - phy_write(phydev, 0x14, 0x5C1D); + ret = phy_write(phydev, 0x17, 0x029A); + if (ret) + return ret; + ret = phy_write(phydev, 0x14, 0x5C1D); + if (ret) + return ret; /* Program fraction FR_PLL_DIV1 */ - phy_write(phydev, 0x17, 0xAAAA); - phy_write(phydev, 0x14, 0x5C1C); + ret = phy_write(phydev, 0x17, 0xAAAA); + if (ret) + return ret; + ret = phy_write(phydev, 0x14, 0x5C1C); + if (ret) + return ret; return 0; }