From patchwork Fri Dec 15 06:24:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 122061 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp74652qgn; Thu, 14 Dec 2017 22:28:08 -0800 (PST) X-Google-Smtp-Source: ACJfBosW1EKbrHMP2vDHn1qGIYwNnyAMlSjNZIzrbFGKUtxSKBFHl0gQ8oD401ew89o9Rmth1FnK X-Received: by 10.84.195.3 with SMTP id i3mr12332671pld.282.1513319288827; Thu, 14 Dec 2017 22:28:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513319288; cv=none; d=google.com; s=arc-20160816; b=eF4ED2oBXBtrt6otE+AV8oo5aS2PWeWpuKz1hqPaZ4jYngC5MJgE8+LFRxJ5uYz9JW 42gpg0UxkupMoZq0Bc4zUHmJFJbGgmEFyKxOzTbCBDikCrz3B5lapR3ttzpdLGLlNeHi d6qJhq8+SzA0N4XTqKFR7yMXszUXOHrzImhZKwI813hBW2zvvvhvIK6NEPyeNQ7MwOF1 4F32S3noAgTlwRQ9mN+rwxSSDYko8Dkc/4i3FMleH5erQ81KkZfMrTUZeIWggeBiQATY WLCBZAR46iqKABFv9EYY8iskoG+Yn/TfRintO6K3CrOLaOSkB1ECP9JN98seUPDd4Ls0 T9Sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=MmeXrzlOkSF+o6sRekrOPZA4BeayCEemuTwAXJU7Buk=; b=pqexkkVPU9O6rAcLqXh4/SBPp7LrcuOyTVabepwCIWSCuA2hy4XDVnwV5veTR9weO/ f/WtU8YLJd7RFpBhLMlx6ju0LonWRzFtngoWAY5jD2Kq0TOJFXKhaLkQ6vSKgKwcdS1a CBnHxWEqgjav2NxH/Nol7jnTmX25FEgS3vHn8J3MGFZrzJUXMKnFdcvuRFVPHgorfkfZ D7hY11txc9vZ6K3XKtyeKmecQVNLXIH+5x2vcoglZsXPVSaLxk51cO3zK0ztPmhera0B ffFoI0ituFC165PbYnEb6IMmajok14DjARI07P1gQYZ6ZMcaBBL3/kZO75u/3UXt+XKw uI7Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=Hs7btoVD; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a3si3804902pgv.360.2017.12.14.22.28.08; Thu, 14 Dec 2017 22:28:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=Hs7btoVD; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754613AbdLOG2E (ORCPT + 20 others); Fri, 15 Dec 2017 01:28:04 -0500 Received: from mail-pg0-f66.google.com ([74.125.83.66]:37064 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752740AbdLOG17 (ORCPT ); Fri, 15 Dec 2017 01:27:59 -0500 Received: by mail-pg0-f66.google.com with SMTP id y6so5173276pgp.4; Thu, 14 Dec 2017 22:27:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=MmeXrzlOkSF+o6sRekrOPZA4BeayCEemuTwAXJU7Buk=; b=Hs7btoVDSAVmMljeeZ9kAy7Vkc1b5goPArhW90FwJbH2z5Dxc+4CQcmTReazdTfO9+ beCDeJkox28xGebLN0UDhNwM9RxEBJJALxKvH5YCX6yUMDYtrjiVSJHzX/KWFQmdem+Z DOEuQ2FPVVqf4ZDf50zKTTnaIPjsBOeM0LYaL1jhZZB018s2BDVAhbGJW3zSmDYPI6Sj zLizVcMTFAZhAOj28rL4ti1GFv5+wlQEF3FwcyljavvsaH6IWrprlBC8oeIjmGd1mb4l JGU2NpAgwJ3GrXaxVVRdGDa3WQPB035gbym3XGMkvrK6TSbtfY+UaSTjSc645+RgcpZG 5Z2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=MmeXrzlOkSF+o6sRekrOPZA4BeayCEemuTwAXJU7Buk=; b=o9dn7+QEc/FXc7I9ZgJ32bV95QaqIxp+DZZ3PbJlZxkV86XVG7o2NsLAs54BxxUd6R 2OvEQTMVvKPiUDR40NQcOUkI1QJMyMDfvTpyJbhPLQbykYMAT6PXLJ9VtaGy2o1MKLH0 p1jpc8fekNTD4jtisoIw8BS+vMqP1hrmRmvCvU+A0tRMmDHMAevps0XALrLwZUHhYbAo ZLAGFYJF/55acPvyJD37eQdbpH5xwB0o3ZCop8on4nIivniejFPER+o0CkdUNX8XIaz6 BJgRnVQQerUjU11vijD8kENARFKBkWi4PyNAtVBFVtlqbu0iSNx9pt0zckie4FlY+oJJ o0jw== X-Gm-Message-State: AKGB3mIWfll+Pczv9en7Ep3BYN9uH+B08s4OFmi2d8AYYdzs5qHmCdzX B2vBl3ER8Xa39o6A2ULZ3WM= X-Received: by 10.98.80.208 with SMTP id g77mr12296933pfj.201.1513319278587; Thu, 14 Dec 2017 22:27:58 -0800 (PST) Received: from aurora.jms.id.au ([203.0.153.9]) by smtp.gmail.com with ESMTPSA id g127sm8824385pgc.29.2017.12.14.22.27.51 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Dec 2017 22:27:57 -0800 (PST) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Fri, 15 Dec 2017 16:57:48 +1030 From: Joel Stanley To: Rob Herring , Mark Rutland , Arnd Bergmann , Andrew Jeffery , Patrick Venture , Xo Wang , Lei YU Cc: Rick Altherr , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-aspeed@lists.ozlabs.org, Peter Hanson Subject: [PATCH v2 17/19] ARM: dts: aspeed: Add Qanta Q71L BMC machine Date: Fri, 15 Dec 2017 16:54:41 +1030 Message-Id: <20171215062443.23059-18-joel@jms.id.au> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171215062443.23059-1-joel@jms.id.au> References: <20171215062443.23059-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rick Altherr The Qanta Q71L BMC is an ASPEED ast2400 based BMC that is part of a Qanta x86 server. This adds the device tree description for most upstream components. It is a squashed commit from the OpenBMC kernel tree. Signed-off-by: Peter Hanson Signed-off-by: Andrew Jeffery Signed-off-by: Patrick Venture Signed-off-by: Rick Altherr Signed-off-by: Joel Stanley --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 458 +++++++++++++++++++++++++++ 2 files changed, 460 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts -- 2.14.1 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 48c55f307aa9..5ab5d9169511 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1106,5 +1106,6 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-opp-palmetto.dtb \ aspeed-bmc-opp-romulus.dtb \ aspeed-bmc-opp-witherspoon.dtb \ - aspeed-bmc-opp-zaius.dtb + aspeed-bmc-opp-zaius.dtb \ + aspeed-bmc-quanta-q71l.dtb endif diff --git a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts new file mode 100644 index 000000000000..2f40bab63149 --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts @@ -0,0 +1,458 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "aspeed-g4.dtsi" + +/ { + model = "Quanta Q71L BMC"; + compatible = "quanta,q71l-bmc", "aspeed,ast2400"; + + chosen { + stdout-path = &uart5; + bootargs = "console=ttyS4,115200 earlyprintk"; + }; + + memory { + reg = <0x40000000 0x8000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vga_memory: framebuffer@47800000 { + no-map; + reg = <0x47800000 0x00800000>; /* 8MB */ + }; + }; + + leds { + compatible = "gpio-leds"; + + heartbeat { + gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>; + }; + + power { + gpios = <&gpio ASPEED_GPIO(B, 2) GPIO_ACTIVE_LOW>; + }; + + identify { + gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, + <&adc 8>, <&adc 9>, <&adc 10>; + }; + + iio-hwmon-battery { + compatible = "iio-hwmon"; + io-channels = <&adc 11>; + }; + + i2c1mux: i2cmux { + compatible = "i2c-mux-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + /* mux-gpios = <&sgpio 10 GPIO_ACTIVE_HIGH> */ + i2c-parent = <&i2c1>; + }; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + label = "bmc"; + m25p,fast-read; +#include "openbmc-flash-layout.dtsi" + }; +}; + +&spi { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1_default>; + + flash@0 { + status = "okay"; + m25p,fast-read; + label = "pnor"; + }; +}; + +&pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_vgahs_default &pinctrl_vgavs_default + &pinctrl_ddcclk_default &pinctrl_ddcdat_default>; +}; + +&lpc_snoop { + status = "okay"; + snoop-ports = <0x80>; +}; + +&mac0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rmii1_default>; + use-ncsi; +}; + +&mac1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; +}; + +&uart5 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + /* temp2 inlet */ + tmp75@4c { + compatible = "ti,tmp75"; + reg = <0x4c>; + }; + + /* temp3 */ + tmp75@4e { + compatible = "ti,tmp75"; + reg = <0x4e>; + }; + + /* temp1 */ + tmp75@4f { + compatible = "ti,tmp75"; + reg = <0x4f>; + }; + + /* Baseboard FRU */ + eeprom@54 { + compatible = "atmel,24c64"; + reg = <0x54>; + }; + + /* FP FRU */ + eeprom@57 { + compatible = "atmel,24c64"; + reg = <0x57>; + }; +}; + +&i2c2 { + status = "okay"; + + /* 0: PCIe Slot 2, + * Slot 3, + * Slot 6, + * Slot 7 + */ + i2c-switch@74 { + compatible = "nxp,pca9546"; + reg = <0x74>; + #address-cells = <1>; + #size-cells = <0>; + i2c-mux-idle-disconnect; /* may use mux@77 next. */ + + i2c_pcie2: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c_pcie3: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c_pcie6: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c_pcie7: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; + + /* 0: PCIe Slot 1, + * Slot 4, + * Slot 5, + * Slot 8, + * Slot 9, + * Slot 10, + * SSD 1, + * SSD 2 + */ + i2c-switch@77 { + compatible = "nxp,pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x77>; + i2c-mux-idle-disconnect; /* may use mux@74 next. */ + + i2c_pcie1: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c_pcie4: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c_pcie5: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c_pcie8: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + + i2c_pcie9: i2c@4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + + i2c_pcie10: i2c@5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + + i2c_ssd1: i2c@6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + }; + + i2c_ssd2: i2c@7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; + }; +}; + +&i2c3 { + status = "okay"; + + /* BIOS FRU */ + eeprom@56 { + compatible = "atmel,24c64"; + reg = <0x56>; + }; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; +}; + +&i2c7 { + status = "okay"; + + /* 0: PSU4 + * PSU1 + * PSU3 + * PSU2 + */ + i2c-switch@70 { + compatible = "nxp,pca9546"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + i2c_psu4: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c_psu1: i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + + i2c_psu3: i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c_psu2: i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + }; + + /* PDB FRU */ + eeprom@52 { + compatible = "atmel,24c64"; + reg = <0x52>; + }; +}; + +&i2c8 { + status = "okay"; + + /* BMC FRU */ + eeprom@50 { + compatible = "atmel,24c64"; + reg = <0x50>; + }; +}; + +&vuart { + status = "okay"; +}; + +&wdt2 { + status = "okay"; +}; + +&pwm_tacho { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default + &pinctrl_pwm1_default + &pinctrl_pwm2_default + &pinctrl_pwm3_default>; + + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00>; + }; + + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x01>; + }; + + fan@2 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x02>; + }; + + fan@3 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x03>; + }; + + fan@4 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x04>; + }; + + fan@5 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x05>; + }; + + fan@6 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x06>; + }; + + fan@7 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x07>; + }; +}; + +&i2c1mux { + i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + /* Memory Riser 1 FRU */ + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + + /* Memory Riser 2 FRU */ + eeprom@51 { + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + /* Memory Riser 3 FRU */ + eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Memory Riser 4 FRU */ + eeprom@53 { + compatible = "atmel,24c02"; + reg = <0x53>; + }; + }; + + i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + /* Memory Riser 5 FRU */ + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + + /* Memory Riser 6 FRU */ + eeprom@51 { + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + /* Memory Riser 7 FRU */ + eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Memory Riser 8 FRU */ + eeprom@53 { + compatible = "atmel,24c02"; + reg = <0x53>; + }; + }; +};