From patchwork Thu Dec 14 13:40:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 121949 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp6821614qgn; Thu, 14 Dec 2017 05:43:19 -0800 (PST) X-Google-Smtp-Source: ACJfBos94JzkC97qoGdB+3OAg90neUzoCgOTQFNAPFKRdGapDBQrSRMKfVdQqtTG5q7vU989vumX X-Received: by 10.98.102.74 with SMTP id a71mr9591897pfc.184.1513258999803; Thu, 14 Dec 2017 05:43:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513258999; cv=none; d=google.com; s=arc-20160816; b=pNcEujjQCTm/9UPWXP0/PY0HEszNB/TrKqGXJ/l8Odgx9MpVIg9IsvPlkbcRgKJBi0 DJrP+TEw2EOWbnDWurR10yZITGbQgFA095Eq28sFolBUgSpRYd/2NaDz/C0rWwUqYGMN kKBJPVBMbI7Zj2jEhPDMIFtifOLnylNyTMV8KyURKWR26TKQe3PQChl4UuHWGMA25lmF sKakqfiRY1mX51Ho4tSiA1ME5tquOH3ads7aPA/A3L741MtwXihu4K3ntN+XihWFaPDj 7YGDd65Ud9modyXg1HeIoFZJ/qeQPsVGZA6OFfsAkIiS8bzDFIDeCEmVRx5cm2d0neoK wwHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=sp0gZMbx5tm3F1NRW7ttnn1gV2pEl5m88kHjrKJ2Jac=; b=v3EkW283CndLdP17ud1WtPwITWZsnc63P4DItOOR0HXOUWomstzXZAFST1KI8yXatE 5ubE07JJwvXNkNUlGaubflUnGg8xyRh4fh3onQU7+Mz3PO3u+m/kTAUqfJXQpCgaj+8b n07LjtLeA9nipAcscO3RxFs67mH0/ib6xCEdqCbtbbn1Wv/1wm+2F8FY2cvE9jhuybTT GwOvL4TFlvi53JnhmYK92MM2hQ5wDLZvTt2EotctmV0JpcPwJjstiZfOjcclKDJte6TN 2QC2LQGd5qIU/iBX9jyCICY+En39Dfutn8/GXzt0Lt/X3SybWOi566pnheiy/Vy+FwOW km2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VpWAVwn6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u131si2940937pgc.145.2017.12.14.05.43.19; Thu, 14 Dec 2017 05:43:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VpWAVwn6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753039AbdLNNnQ (ORCPT + 20 others); Thu, 14 Dec 2017 08:43:16 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:29536 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752780AbdLNNm0 (ORCPT ); Thu, 14 Dec 2017 08:42:26 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBEDfksE012776; Thu, 14 Dec 2017 07:41:46 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513258906; bh=phxvtFZQQ5B1oFMZyXAflWCP8CaVqk32ik+t02RngWo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=VpWAVwn6edeQAbW0jCiuy6QxRv+BqmvbMCG4bMOuHKfI//EYvMncIsmAXUvIVhyya 7yTonJF7XBmxCYxGp9Io6zLGB45TIEgP/VlI1zqJkmD4KpPdnpKzOQ2OKH7PSgv5wC BZT2uOFs3lvYppmgXyfxiIseYMpfOgxiim4gfBlk= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDfjcW003212; Thu, 14 Dec 2017 07:41:45 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 14 Dec 2017 07:41:45 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 14 Dec 2017 07:41:45 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDewBO009855; Thu, 14 Dec 2017 07:41:42 -0600 From: Kishon Vijay Abraham I To: Tony Lindgren , , Santosh Shilimkar CC: Rob Herring , Mark Rutland , Russell King , , , , , , , Subject: [PATCH 11/14] ARM: dts: dra71-evm: Select pull down for mmc1_clk line in default mode Date: Thu, 14 Dec 2017 19:10:51 +0530 Message-ID: <20171214134054.7749-12-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171214134054.7749-1-kishon@ti.com> References: <20171214134054.7749-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org During a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type. According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK low for at least 5ms. In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down. This is specific only to dra71-evm (and not all dra72 based boards) since mmc1_clk line in dra71-evm is not connected to an external pullup. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra71-evm.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.11.0 diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts index 64363f75c01a..ebc4bbae981e 100644 --- a/arch/arm/boot/dts/dra71-evm.dts +++ b/arch/arm/boot/dts/dra71-evm.dts @@ -50,6 +50,19 @@ }; }; +&dra7_pmx_core { + mmc1_pins_default: mmc1_pins_default { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */ + DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ + DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ + DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ + DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ + DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ + >; + }; +}; + &i2c1 { status = "okay"; clock-frequency = <400000>;