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[209.132.180.67]) by mx.google.com with ESMTP id n16si1118583pll.476.2017.12.14.05.11.42; Thu, 14 Dec 2017 05:11:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=qXVwLjYS; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752685AbdLNNLk (ORCPT + 20 others); Thu, 14 Dec 2017 08:11:40 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:28327 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752511AbdLNNLa (ORCPT ); Thu, 14 Dec 2017 08:11:30 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBEDAnKS008239; Thu, 14 Dec 2017 07:10:49 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513257049; bh=v7rIXG4/X+tOoMs2PCvAninKpcVkn+DGNAR5IDE0C8M=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=qXVwLjYS9PKOr69rTnPuqLDxZcgYQV3ZA8mV6ha92voOtfMLLZ8AHtXms4ZZAUQNe Sf8yzIow4155b/hsmsoYTSDvYZcJhpkebbV7j1apqmxf8g4OVYeeaER43kjbKrf3bQ z6YdvGTX7/tnf/jjL34rM9gwqdPU8bSpWKPt//ss= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDAnBv020871; Thu, 14 Dec 2017 07:10:49 -0600 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 14 Dec 2017 07:10:48 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 14 Dec 2017 07:10:48 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBED9wdY032017; Thu, 14 Dec 2017 07:10:45 -0600 From: Kishon Vijay Abraham I To: Ulf Hansson , Rob Herring , Tony Lindgren , Adrian Hunter CC: Mark Rutland , Russell King , , , , , , , Subject: [PATCH 12/12] ARM: OMAP2+: Use sdhci-omap specific pdata-quirks for MMC/SD on DRA74x EVM Date: Thu, 14 Dec 2017 18:39:41 +0530 Message-ID: <20171214130941.26666-13-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171214130941.26666-1-kishon@ti.com> References: <20171214130941.26666-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use sdhci-omap specific pdata-quirks for MMC/SD on DRA74x EVM since UHS modes are supported only in sdhci-omap (and not in omap-hsmmc). Signed-off-by: Kishon Vijay Abraham I --- arch/arm/mach-omap2/pdata-quirks.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) -- 2.11.0 diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 6b433fce65a5..92fb8828d57f 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -21,7 +21,7 @@ #include #include -#include +#include #include #include #include @@ -38,7 +38,7 @@ #include "soc.h" #include "hsmmc.h" -static struct omap_hsmmc_platform_data __maybe_unused mmc_pdata[2]; +static struct sdhci_omap_platform_data __maybe_unused mmc_pdata[2]; struct pdata_init { const char *compatible; @@ -435,21 +435,21 @@ static void __init omap5_uevm_legacy_init(void) #endif #ifdef CONFIG_SOC_DRA7XX -static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1; -static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2; -static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3; +static struct sdhci_omap_platform_data dra7_sdhci_data_mmc1; +static struct sdhci_omap_platform_data dra7_sdhci_data_mmc2; +static struct sdhci_omap_platform_data dra7_sdhci_data_mmc3; static void __init dra7x_evm_mmc_quirk(void) { if (omap_rev() == DRA752_REV_ES1_1 || omap_rev() == DRA752_REV_ES1_0) { - dra7_hsmmc_data_mmc1.version = "rev11"; - dra7_hsmmc_data_mmc1.max_freq = 96000000; + dra7_sdhci_data_mmc1.version = "rev11"; + dra7_sdhci_data_mmc1.max_freq = 96000000; - dra7_hsmmc_data_mmc2.version = "rev11"; - dra7_hsmmc_data_mmc2.max_freq = 48000000; + dra7_sdhci_data_mmc2.version = "rev11"; + dra7_sdhci_data_mmc2.max_freq = 48000000; - dra7_hsmmc_data_mmc3.version = "rev11"; - dra7_hsmmc_data_mmc3.max_freq = 48000000; + dra7_sdhci_data_mmc3.version = "rev11"; + dra7_sdhci_data_mmc3.max_freq = 48000000; } } #endif @@ -582,12 +582,12 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { &omap4_iommu_pdata), #endif #ifdef CONFIG_SOC_DRA7XX - OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x4809c000, "4809c000.mmc", - &dra7_hsmmc_data_mmc1), - OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480b4000, "480b4000.mmc", - &dra7_hsmmc_data_mmc2), - OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480ad000, "480ad000.mmc", - &dra7_hsmmc_data_mmc3), + OF_DEV_AUXDATA("ti,dra7-sdhci", 0x4809c000, "4809c000.mmc", + &dra7_sdhci_data_mmc1), + OF_DEV_AUXDATA("ti,dra7-sdhci", 0x480b4000, "480b4000.mmc", + &dra7_sdhci_data_mmc2), + OF_DEV_AUXDATA("ti,dra7-sdhci", 0x480ad000, "480ad000.mmc", + &dra7_sdhci_data_mmc3), #endif /* Common auxdata */ OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),