From patchwork Thu Nov 2 03:53:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 117744 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp1665935qgn; Wed, 1 Nov 2017 20:54:31 -0700 (PDT) X-Google-Smtp-Source: ABhQp+THuCm8tfntfMDayqVvqiB9+poU9N14xFawnWfWbmC6w0VjhAGlJHsEuNyeIxVtkz5uSSth X-Received: by 10.98.192.6 with SMTP id x6mr2197314pff.170.1509594871855; Wed, 01 Nov 2017 20:54:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509594871; cv=none; d=google.com; s=arc-20160816; b=Uo6phPW+tEkz4oJU6G1n2RdDnUJmGy6INkU3Vcn5XXhpgD4A6QQwOidIGGufFIIDes OtfpJ6vuY60HMDdgFbYo1CIKIH4P0MdQM+wYZQ3SrGnkQpFFEIbol979+h4AV9/TvzB7 M0E8q7l6cRvqaKevOqLSkMH0w5UGSL0oNFMJpYk0SydUqDR8gymYVOBCK25IoRwx7fxQ /ug7R7vcdpOARBfat5rwvbhbcvFJRDhptqvcrZbu3okvQwFRm3SNza0xrYR7rS+5iCmL Fv4b9iwNrj0u+sHPwkkZCjnEGY1RtrN0xuezH4Z7+FDKpTU+nVIy+IdM2ysEGVUyuJw1 9NSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=EXZUFepyPsebzfu+PFLZGUDqVsy9nTVqCsRwdtgKDr4=; b=Zz9kSuoWcU9tGfHUZIqWepvSQHM+U55LIiwMVTyTOMAhH5ajKye5b7X+9VfZivAprB bmP8RCpyas8W2l3RDU6otmY33w1sWjj3OaEXD3bzC8B5WCvaO+aaGF2fF93Aum+AOu2l neEIiuc8Ub6S0ERr77NniWrtIkpIW/U08AJwgyQIjmkraIjpylAHbPaNwtCpBL3JHOLT FHpIEiBpOt7CB/7hV4BlzqFL4iJX0ps40bGckErOkWsCmqxDLM0jd0otAdus9r0EZp3/ RCuC5KEB3qmRX8SM+L39iLaW/5cab/y4//GZvDb3O7Eoopkmo2IFmlC6tZt+RUfgGpPG lKfg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=o4F+Lze1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c11si1178630pls.397.2017.11.01.20.54.31; Wed, 01 Nov 2017 20:54:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=o4F+Lze1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934391AbdKBDya (ORCPT + 26 others); Wed, 1 Nov 2017 23:54:30 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:47794 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934073AbdKBDy1 (ORCPT ); Wed, 1 Nov 2017 23:54:27 -0400 Received: by mail-pf0-f195.google.com with SMTP id z11so3591741pfk.4; Wed, 01 Nov 2017 20:54:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=EXZUFepyPsebzfu+PFLZGUDqVsy9nTVqCsRwdtgKDr4=; b=o4F+Lze1pvuSkJb/mt1F5bpuCv1BAN2X2ws6ggVzdhpU2ELSgXgtJBVwNo0iSfOQSv hiUQS7UoxxCbVLHEoLsPJw1py7Uo4rhzyNcnWY/R9k1A0Gypu8tL6qjQl+UhGOJs5mPp GqGwj/uRfrE2Q/LowrlaKR3kCUQ+uYnTtxzsy0BZ1+hy0lz7AxiDVZSqnVlmO17oUS0s WMLJjKl6dZpbp2wD5N+Z8ZZThY0t8uXbZt8XoPdwANwBxmEDNIzWEOrW51g+y7b2JKCH /sJfQbUExWvRIQJTZm/wrCVD2kRUXWy9hH5TpMk9Y9bGQgOsgzb8yCIh3OCsGgY0lde6 ItoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=EXZUFepyPsebzfu+PFLZGUDqVsy9nTVqCsRwdtgKDr4=; b=PNSmqkSmapyQaVudMh0ptKZcXFfsR5p2RF4Q0wOTvefP1sv8UD3/Zl8yVM2gKt4AOh 8C0jmkQVYqJdABCho4F6yY3CM7d5Elzuo1R15Upk90JOrvIty2O3NWimBSHtm/PUpSqJ OAirnYtAnq7Fuzn5+pCjm74SFnLyQtjkycOJnzK9fuAmNyR80a7k+8B80vHx0YXuWWeu Q6gTBU5kfDN2FneOwmpjdsQ0UqAVcy1SJDjB4rVYeT+haYChA5uhQtG6LILQ3wg/Yxhb GtekL/sldCn7s404/WFQeXP1oa5o1qN/ENRytW4qIp68b47PZ6jXo+70r6JWoi+XJ+CA 3i1A== X-Gm-Message-State: AMCzsaVw2zl8Ltmv6xwdb0qLNxk4slfrUZuSI++4dIHKfBZ5sPjH5RQI sl3zrFqvgUemA562vIoJ1pE= X-Received: by 10.99.136.198 with SMTP id l189mr2061155pgd.165.1509594866877; Wed, 01 Nov 2017 20:54:26 -0700 (PDT) Received: from aurora.jms.id.au ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id b10sm3737174pfk.20.2017.11.01.20.54.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 01 Nov 2017 20:54:25 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Thu, 02 Nov 2017 14:54:19 +1100 From: Joel Stanley To: Guenter Roeck , Rob Herring Cc: Philipp Zabel , Mykola Kostenok , Jaghathiswari Rankappagounder Natarajan , Patrick Venture , Andrew Jeffery , devicetree@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] dt-bindings: hwmon: aspeed-pwm-tacho: Add reset node Date: Thu, 2 Nov 2017 14:53:49 +1100 Message-Id: <20171102035349.1902-4-joel@jms.id.au> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171102035349.1902-1-joel@jms.id.au> References: <20171102035349.1902-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The device tree bindings are updated to document the resets phandle, and the example is updated to match what is expected for both the reset and clock phandle. Note that the bindings should have always had the reset controller, as the hardware is unusable without it. Signed-off-by: Joel Stanley --- .../devicetree/bindings/hwmon/aspeed-pwm-tacho.txt | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) -- 2.14.1 diff --git a/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt b/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt index 367c8203213b..3ac02988a1a5 100644 --- a/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt +++ b/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt @@ -22,8 +22,9 @@ Required properties for pwm-tacho node: - compatible : should be "aspeed,ast2400-pwm-tacho" for AST2400 and "aspeed,ast2500-pwm-tacho" for AST2500. -- clocks : a fixed clock providing input clock frequency(PWM - and Fan Tach clock) +- clocks : phandle to clock provider with the clock number in the second cell + +- resets : phandle to reset controller with the reset number in the second cell fan subnode format: =================== @@ -48,19 +49,14 @@ Required properties for each child node: Examples: -pwm_tacho_fixed_clk: fixedclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; -}; - pwm_tacho: pwmtachocontroller@1e786000 { #address-cells = <1>; #size-cells = <1>; #cooling-cells = <2>; reg = <0x1E786000 0x1000>; compatible = "aspeed,ast2500-pwm-tacho"; - clocks = <&pwm_tacho_fixed_clk>; + clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_PWM>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;