From patchwork Wed Oct 18 11:44:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Corentin Labbe X-Patchwork-Id: 116268 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp5965133qgn; Wed, 18 Oct 2017 04:47:20 -0700 (PDT) X-Received: by 10.99.98.6 with SMTP id w6mr13611088pgb.189.1508327240845; Wed, 18 Oct 2017 04:47:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508327240; cv=none; d=google.com; s=arc-20160816; b=vAy3TPbwcFxL9ByhZVXmgYFh7gOxra9aRU7bZw/uscFe67N0m4coevwqNjK98Jo+Te rjzC/hOpGQBFJH8ZzFU9L8KL4tVsWeA7+Ji+Zx8A4CBsHLiJ53Q39eLayhSaiOhwPHQu qKCQfS0JYLudhuCKg1jBYTsrlPuJ0dw47EBFe6RSzFg79hglpHdziAfPB2X4KkrDyu46 SAGezik5pGpGnzCHYrfdxEnA2Ao0IB5lvImaVgaEYEjZ+ZQPqvVBClRTVnQ2jPfi8yiw mH/nyWJjz6SRWJIlVexegC/DM6wwE6/Xa1LD/HIAcaVtwJA3rmwRFui/eYAVrfsaKO8/ qU9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=196DxAdiAIubhXPg58CYxaK7OcAX+X/0A5rx2xTS8Ns=; b=EvqfxBugJ+PwxDnyGGgUmTEKCCqdVyWd2MJlUQb6ZPtX70CBME/SRxvCGJE68dyG/h mviykGkw8f5k0MdQnLKnLBgdVXZwvNL0YDBjn6oFvjo+ut7pjuYTVpm9HkrlMEFVAosk 3kHOs+Fzw6W6jxveMefIyqocC6dNGVaTeeapoBt+9gQJc9zGvr80wJayy58Z8BxguwWF KNB5zqEmCS/5MYoGhsHdttRWhcJ7FzEfDzWCvlmIr4FPWLLlXmn4mQs0CvFThSVhe0TG ol1rzmj2rrL+hs/XQ8YZB0BJbyU63gMOyP9S+E4vq07aYGJwfaDaMEN9AIeqDMqRisN3 wz7w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=fKWlvjvl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f6si7609860plt.152.2017.10.18.04.47.20; Wed, 18 Oct 2017 04:47:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=fKWlvjvl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932419AbdJRLrS (ORCPT + 27 others); Wed, 18 Oct 2017 07:47:18 -0400 Received: from mail-wr0-f195.google.com ([209.85.128.195]:44856 "EHLO mail-wr0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754406AbdJRLrN (ORCPT ); Wed, 18 Oct 2017 07:47:13 -0400 Received: by mail-wr0-f195.google.com with SMTP id l24so4711480wre.1; Wed, 18 Oct 2017 04:47:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=196DxAdiAIubhXPg58CYxaK7OcAX+X/0A5rx2xTS8Ns=; b=fKWlvjvl6l4paefvJUVxddSFeod+0wB1dKrvEfDvfxbQMfCPycl4vVuZnR66B0qiC/ 7R4sjjpfDEfmG1MpqOB+irk5VfRZlNGU/y0tSpInTui7pmZPk8a3H4s6deuKe0Wn02AY iEYW2Am4DJKqKXm7uIZM3WqjmNRGSFEilYUxfV8lwSn8WnBG818+47KMLPi7YXhCTSgD 8cy3r2h8N+gNnL/w1IhaBMoV50rJ0VLNZb5A3apYjioJ9i/ET/959T4y5iJqhIxdejeg KLhWLdjCwTuOHW8II77tuT9nhn8HSmzNZvheaDUPsBeuUWRJK82eX3a355eCl1dzGtUC PkPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=196DxAdiAIubhXPg58CYxaK7OcAX+X/0A5rx2xTS8Ns=; b=ahwba5Yp6CcZlk4YZ2C6cZrGrS5p61gpSFXbupUHnJWUwWa08rYmRrmt7kozpoXjfh HB0nMXGWgoSmd37sWxorK+pSJNYFsDyE2/YS4R1SwXjhUtWfocnKH5QJpeDNkBfMjRud Y5tUkQ8sHNQKtRlkifkWZmqfYdzNMK/MeeQoWMwdR1JreSJSuW3A7wZJ9V0B6nEDWmwa QnBGHK4Dgr/2u/cn+HNmS0nox9NiUOqykTVJLQeYAH0K9C0L31+pfVAW+vc/UoUNnHuu ZXiVv430F/qu+3Pp2quQjQ8JMyQvGtM+SoiAbiyZg/o1U66iAeuzoJtyyWV59Da4KzUW KZ+g== X-Gm-Message-State: AMCzsaX1T+vWVUshmqb6zCYQ8/jqYdDGVpWRH/OpZFoEaXE38DI+2gcQ 3PBYmA8SbzQm6Ojz4Bemt08= X-Google-Smtp-Source: ABhQp+TVr+cPRT2E66R5hLCQwgxS92mWnbGzRmrrH7DibQsN13rCKH73Eco66L1IE7dxmBAI68LomA== X-Received: by 10.223.146.37 with SMTP id 34mr6309024wrj.79.1508327232228; Wed, 18 Oct 2017 04:47:12 -0700 (PDT) Received: from Red.local (LFbn-MAR-1-580-96.w90-118.abo.wanadoo.fr. [90.118.159.96]) by smtp.googlemail.com with ESMTPSA id 61sm8444391wrg.58.2017.10.18.04.47.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 Oct 2017 04:47:11 -0700 (PDT) From: Corentin Labbe To: robh+dt@kernel.org, mark.rutland@arm.com, maxime.ripard@free-electrons.com, wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com, andrew@lunn.ch, f.fainelli@gmail.com, frowand.list@gmail.com Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, Corentin Labbe Subject: [PATCH v7 01/10] dt-bindings: net: Restore sun8i dwmac binding Date: Wed, 18 Oct 2017 13:44:49 +0200 Message-Id: <20171018114458.17891-2-clabbe.montjoie@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171018114458.17891-1-clabbe.montjoie@gmail.com> References: <20171018114458.17891-1-clabbe.montjoie@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The original dwmac-sun8i DT bindings have some issue on how to handle integrated PHY and was reverted in last RC of 4.13. But now we have a solution so we need to get back that was reverted. This patch restore dt-bindings documentation about dwmac-sun8i This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac binding") Signed-off-by: Corentin Labbe --- .../devicetree/bindings/net/dwmac-sun8i.txt | 84 ++++++++++++++++++++++ 1 file changed, 84 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt -- 2.13.6 diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt new file mode 100644 index 000000000000..725f3b187886 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt @@ -0,0 +1,84 @@ +* Allwinner sun8i GMAC ethernet controller + +This device is a platform glue layer for stmmac. +Please see stmmac.txt for the other unchanged properties. + +Required properties: +- compatible: should be one of the following string: + "allwinner,sun8i-a83t-emac" + "allwinner,sun8i-h3-emac" + "allwinner,sun8i-v3s-emac" + "allwinner,sun50i-a64-emac" +- reg: address and length of the register for the device. +- interrupts: interrupt for the device +- interrupt-names: should be "macirq" +- clocks: A phandle to the reference clock for this device +- clock-names: should be "stmmaceth" +- resets: A phandle to the reset control for this device +- reset-names: should be "stmmaceth" +- phy-mode: See ethernet.txt +- phy-handle: See ethernet.txt +- #address-cells: shall be 1 +- #size-cells: shall be 0 +- syscon: A phandle to the syscon of the SoC with one of the following + compatible string: + - allwinner,sun8i-h3-system-controller + - allwinner,sun8i-v3s-system-controller + - allwinner,sun50i-a64-system-controller + - allwinner,sun8i-a83t-system-controller + +Optional properties: +- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0) +- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0) +Both delay properties need to be a multiple of 100. They control the delay for +external PHY. + +Optional properties for the following compatibles: + - "allwinner,sun8i-h3-emac", + - "allwinner,sun8i-v3s-emac": +- allwinner,leds-active-low: EPHY LEDs are active low + +Required child node of emac: +- mdio bus node: should be named mdio + +Required properties of the mdio node: +- #address-cells: shall be 1 +- #size-cells: shall be 0 + +The device node referenced by "phy" or "phy-handle" should be a child node +of the mdio node. See phy.txt for the generic PHY bindings. + +Required properties of the phy node with the following compatibles: + - "allwinner,sun8i-h3-emac", + - "allwinner,sun8i-v3s-emac": +- clocks: a phandle to the reference clock for the EPHY +- resets: a phandle to the reset control for the EPHY + +Example: + +emac: ethernet@1c0b000 { + compatible = "allwinner,sun8i-h3-emac"; + syscon = <&syscon>; + reg = <0x01c0b000 0x104>; + interrupts = ; + interrupt-names = "macirq"; + resets = <&ccu RST_BUS_EMAC>; + reset-names = "stmmaceth"; + clocks = <&ccu CLK_BUS_EMAC>; + clock-names = "stmmaceth"; + #address-cells = <1>; + #size-cells = <0>; + + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + int_mii_phy: ethernet-phy@1 { + reg = <1>; + clocks = <&ccu CLK_BUS_EPHY>; + resets = <&ccu RST_BUS_EPHY>; + }; + }; +};