From patchwork Mon Oct 9 09:03:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 115194 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp2319601qgn; Mon, 9 Oct 2017 02:04:17 -0700 (PDT) X-Google-Smtp-Source: AOwi7QCklIZxyQAKmgE6iMP7z19mNdLuiH5h/8tnDGnIs9FRtKdYAm+PFIcmc578CLBv3mpkRRhr X-Received: by 10.84.212.22 with SMTP id d22mr8500184pli.255.1507539857327; Mon, 09 Oct 2017 02:04:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507539857; cv=none; d=google.com; s=arc-20160816; b=cC2FixR7/glRyzXuuQPS76FZ40VhEeR9DsRx6qs9zONnsmEmcRfNduKmTw31Xo8I5M ijAiCcTxEv4+RjV2n/BEVgIjKnQaALVhvHPqvDROfcvKlGtMmsH9lB8XY+q3OuSKAmir Mfhp0+cAGJG3n/h0fFbAH+5vNOTVUkIiDgVerXHHTnOV9DxNxVAtwD/7ZPec7OdEVYLF b8Rj4CWgldXogDNrPyn+iorwntHKy7mxo34HPuamgKwSFS2M9QowuBzoqniqf+Ir4DuB 6cehLepBmhe+wGXnoXBueChNgLTcisxqUG8Vy65LsdvzDS63WAfecJ1p8Yyz6J474hsN 5APg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=MmY10VZihWYw59h7FNKdqgcmzIHtuhYT1/+9gYcKqUQ=; b=TGV9GsK2/XsL18eizXhFHHiyN+rwm0TkmA3LFHUQfednrjvg4VlZduObKkfpwjW5IZ 5qs/TyCmZ2WYm0ZULUODw9fg/B34BEyLCfWr5PhIJ8Zv/K+29G9hf9mF65t0P9RERgub 2okLz7n6jzsFqLOLL6u43Qak4hWfVgQ9D7CFx0oS+KdraE3fPRl2KtJsXtlGeqLHhg4T VzXKeYri2mcy1mQLloUjzZCcGtZTWVE0epYxERq9I/ibKMdupg5YmOEuq0uBZof2J0Ng K5JCjcphC1KdWOy9abX7zOaZNIIG7U2zRbUafQHcV2daI6dDY2AWfxy1ArJePYQP+fnV jfpg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=MrZ6t141; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n28si5938036pgf.389.2017.10.09.02.04.17; Mon, 09 Oct 2017 02:04:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=MrZ6t141; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754029AbdJIJEP (ORCPT + 26 others); Mon, 9 Oct 2017 05:04:15 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:45712 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751550AbdJIJEL (ORCPT ); Mon, 9 Oct 2017 05:04:11 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v9993omd026089; Mon, 9 Oct 2017 04:03:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1507539830; bh=KwqqWg6axBpY1al4puFq8DQiD5OpiQ4i2NH7tNyI9wk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=MrZ6t14152k7T+GfS/8huRrJffBSpPqi31JRhNpu6AoWYSXqN88VFan2RdWbe4W7O 0SyGy6Y/NfcA1ffNg4HXtUw7gud3Ip1UeKgWWRelXXYnM/fBEa/MESVFxlnmCbg5Hu HWS/69ZH+HZjTvyPZIedmDs6l51JXmm9CYgou5mY= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v9993jFI020530; Mon, 9 Oct 2017 04:03:45 -0500 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Mon, 9 Oct 2017 04:03:45 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Mon, 9 Oct 2017 04:03:45 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v9993eJY002737; Mon, 9 Oct 2017 04:03:43 -0500 From: Kishon Vijay Abraham I To: Kishon Vijay Abraham I , Bjorn Helgaas CC: Roger Quadros , , , , Subject: [PATCH 1/2] PCI: dwc: dra7xx: Create functional dependency between PCIe and PHY Date: Mon, 9 Oct 2017 14:33:37 +0530 Message-ID: <20171009090338.26033-2-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171009090338.26033-1-kishon@ti.com> References: <20171009090338.26033-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org PCI core access configuration space registers in resume_noirq callbacks. In the case of dra7xx, PIPE3 PHY connected to PCIe controller has to be enabled before accessing configuration space registers. Since PIPE3 PHY is enabled by only configuring control module registers, no aborts has been observed so far (though during noirq stage, interface clock of PIPE3 PHY is not enabled). With new TRM updates, PIPE3 PHY has to be initialized (PIPE3 PHY registers has to be accessed) as well which requires the interface clock of PIPE3 PHY to be enabled. The interface clock of PIPE3 PHY is derived from OCP2SCP and hence PCIe PHY is modeled as a child of OCP2SCP. Since pm_runtime is not enabled during noirq stage, pm_runtime_get_sync done in phy_init doesn't enable OCP2SCP clocks resulting in abort when PIPE3 PHY registers are accessed. Create a function dependency between PCIe and PHY here to make sure PCIe is suspended before PCIe PHY/OCP2SCP and resumed after PCIe PHY/OCP2SCP. Suggested-by: Grygorii Strashko Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Sekhar Nori --- drivers/pci/dwc/pci-dra7xx.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -- 2.11.0 diff --git a/drivers/pci/dwc/pci-dra7xx.c b/drivers/pci/dwc/pci-dra7xx.c index 34427a6a15af..362607f727ee 100644 --- a/drivers/pci/dwc/pci-dra7xx.c +++ b/drivers/pci/dwc/pci-dra7xx.c @@ -11,6 +11,7 @@ */ #include +#include #include #include #include @@ -594,6 +595,7 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) int i; int phy_count; struct phy **phy; + struct device_link **link; void __iomem *base; struct resource *res; struct dw_pcie *pci; @@ -649,11 +651,21 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) if (!phy) return -ENOMEM; + link = devm_kzalloc(dev, sizeof(*link) * phy_count, GFP_KERNEL); + if (!link) + return -ENOMEM; + for (i = 0; i < phy_count; i++) { snprintf(name, sizeof(name), "pcie-phy%d", i); phy[i] = devm_phy_get(dev, name); if (IS_ERR(phy[i])) return PTR_ERR(phy[i]); + + link[i] = device_link_add(dev, &phy[i]->dev, DL_FLAG_STATELESS); + if (!link[i]) { + ret = -EINVAL; + goto err_link; + } } dra7xx->base = base; @@ -732,6 +744,10 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) pm_runtime_disable(dev); dra7xx_pcie_disable_phy(dra7xx); +err_link: + while (--i >= 0) + device_link_del(link[i]); + return ret; }