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[209.132.180.67]) by mx.google.com with ESMTP id 102si937878plf.356.2017.09.28.00.53.31; Thu, 28 Sep 2017 00:53:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=t6wRnR7T; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752498AbdI1Hx3 (ORCPT + 26 others); Thu, 28 Sep 2017 03:53:29 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:38719 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752448AbdI1Hx0 (ORCPT ); Thu, 28 Sep 2017 03:53:26 -0400 Received: by mail-pg0-f68.google.com with SMTP id m30so1060696pgn.5; Thu, 28 Sep 2017 00:53:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=W3AE2lB8EA8cIV5mU2Dh96HRVxUH10d0tBsHDiMaIcc=; b=t6wRnR7TlKv5cqqBd2P+OCBBgG52vbzaRtZdqhnbrgiuQVXRRjsryf7CZA45ZG5OBD k0lOelN4Dof2bgSvmhRu0++J7sdPGClePZ4ZLa4QjOYayvOWcngdqao0Uuj7BXsW0J2D x9d47jLJ/x7A4fMHe1Y3iUbPiQDk8q5S+/YldyQI6BiYgBM0ViD+GHjdY/JqUQqmJOMy wEPFKnTwgtO/7A0RyNG0pdTOkZNafr0V2JZTYWKT2EisUHJ6XZmZIeLF3YOXJ6fCmaGD LVlh+ONXov+CDEySdtLDfg7IXZZmBpYsglUC7BJDNe9tub2BsZih/r0uvJ+yNBP4BBjL sX2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=W3AE2lB8EA8cIV5mU2Dh96HRVxUH10d0tBsHDiMaIcc=; b=UTdJUh6ylW8+PoDDzh8vbsAmDqnKfdzbJR9d4pzl/51bGm6YiMH4eLMTBJNwbz1/ld g325UEj/vJx5yC4corCDBwCWgkV2y52j7NjyqvRtmz4Z05D3DkaSBNPLGUpy7KbIxKsL MQcLKwdSsjOhKPGI/IMKsCYilJZwL//xmdWCUZ8GvZRIWxpWEO5Mytm8/z+5qm4wD5Rr 4JZ4fV/E125F6Ha/t8d+ZqHNuT7SL9/lJaPEjuaPGBzklluyYVetBQrVfrnqYDRDW6Ra oWw4x4qgF1qXQ1jdTPLNTC5nrGltkxRaL3sdxq7n9z2aS1wVUk5Uzjgn3aS6RuJf9L/+ uMuw== X-Gm-Message-State: AHPjjUj4fxELZaxRbGBDb1kisif5GpmXUtqpWd2MW0C4ukpOh1drNeN7 fsu0CbSRT5NtjDYM9d9Y+1c= X-Google-Smtp-Source: AOwi7QAeu4vFLSmT3/0ecZKzjy97BbvW3jtE8HyAHsEjhvC+LbGWJfl+1O4kt5OaBTtYxtuXmPPR5A== X-Received: by 10.99.181.23 with SMTP id y23mr3455510pge.165.1506585205428; Thu, 28 Sep 2017 00:53:25 -0700 (PDT) Received: from aurora.jms.id.au ([203.0.153.9]) by smtp.gmail.com with ESMTPSA id e2sm1801390pfc.176.2017.09.28.00.53.18 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Sep 2017 00:53:23 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Thu, 28 Sep 2017 17:23:16 +0930 From: Joel Stanley To: Joel Stanley , Rob Herring , Mark Rutland Cc: Russell King , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Jeffery , Rick Altherr , Brendan Higgins , =?utf-8?q?C=C3=A9dric_Le_?= =?utf-8?q?Goater?= , linux-aspeed@lists.ozlabs.org Subject: [PATCH 8/8] ARM: dts: aspeed: Clean up UART nodes Date: Thu, 28 Sep 2017 17:21:49 +0930 Message-Id: <20170928075149.8154-9-joel@jms.id.au> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20170928075149.8154-1-joel@jms.id.au> References: <20170928075149.8154-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org - Shorten size of reg property so it covers only the implemented registers - Add VUART compatible - Move stray uart1 in g5 definition - Remove outdated current-speed property. Different bootloaders use different speeds, so this is no longer helpful Signed-off-by: Joel Stanley --- arch/arm/boot/dts/aspeed-g4.dtsi | 17 +++++++++-------- arch/arm/boot/dts/aspeed-g5.dtsi | 36 ++++++++++++++++++------------------ 2 files changed, 27 insertions(+), 26 deletions(-) -- 2.14.1 diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 191c33d18122..7a4a53666d70 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -27,6 +27,7 @@ serial2 = &uart3; serial3 = &uart4; serial4 = &uart5; + serial5 = &vuart; }; cpus { @@ -199,7 +200,7 @@ uart1: serial@1e783000 { compatible = "ns16550a"; - reg = <0x1e783000 0x1000>; + reg = <0x1e783000 0x20>; reg-shift = <2>; interrupts = <9>; clocks = <&clk_uart>; @@ -209,7 +210,7 @@ uart2: serial@1e78d000 { compatible = "ns16550a"; - reg = <0x1e78d000 0x1000>; + reg = <0x1e78d000 0x20>; reg-shift = <2>; interrupts = <32>; clocks = <&clk_uart>; @@ -219,7 +220,7 @@ uart3: serial@1e78e000 { compatible = "ns16550a"; - reg = <0x1e78e000 0x1000>; + reg = <0x1e78e000 0x20>; reg-shift = <2>; interrupts = <33>; clocks = <&clk_uart>; @@ -229,7 +230,7 @@ uart4: serial@1e78f000 { compatible = "ns16550a"; - reg = <0x1e78f000 0x1000>; + reg = <0x1e78f000 0x20>; reg-shift = <2>; interrupts = <34>; clocks = <&clk_uart>; @@ -239,7 +240,7 @@ uart5: serial@1e784000 { compatible = "ns16550a"; - reg = <0x1e784000 0x1000>; + reg = <0x1e784000 0x20>; reg-shift = <2>; interrupts = <10>; clocks = <&clk_uart>; @@ -248,9 +249,9 @@ status = "disabled"; }; - uart6: serial@1e787000 { - compatible = "ns16550a"; - reg = <0x1e787000 0x1000>; + vuart: vuart@1e787000 { + compatible = "aspeed,ast2400-vuart"; + reg = <0x1e787000 0x40>; reg-shift = <2>; interrupts = <10>; clocks = <&clk_uart>; diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 251fc9f4637e..0b793305120a 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -27,6 +27,7 @@ serial2 = &uart3; serial3 = &uart4; serial4 = &uart5; + serial5 = &vuart; }; cpus { @@ -247,16 +248,6 @@ status = "disabled"; }; - uart1: serial@1e783000 { - compatible = "ns16550a"; - reg = <0x1e783000 0x1000>; - reg-shift = <2>; - interrupts = <9>; - clocks = <&clk_uart>; - no-loopback-test; - status = "disabled"; - }; - lpc: lpc@1e789000 { compatible = "aspeed,ast2500-lpc", "simple-mfd"; reg = <0x1e789000 0x1000>; @@ -287,9 +278,19 @@ }; }; + uart1: serial@1e783000 { + compatible = "ns16550a"; + reg = <0x1e783000 0x20>; + reg-shift = <2>; + interrupts = <9>; + clocks = <&clk_uart>; + no-loopback-test; + status = "disabled"; + }; + uart2: serial@1e78d000 { compatible = "ns16550a"; - reg = <0x1e78d000 0x1000>; + reg = <0x1e78d000 0x20>; reg-shift = <2>; interrupts = <32>; clocks = <&clk_uart>; @@ -299,7 +300,7 @@ uart3: serial@1e78e000 { compatible = "ns16550a"; - reg = <0x1e78e000 0x1000>; + reg = <0x1e78e000 0x20>; reg-shift = <2>; interrupts = <33>; clocks = <&clk_uart>; @@ -309,7 +310,7 @@ uart4: serial@1e78f000 { compatible = "ns16550a"; - reg = <0x1e78f000 0x1000>; + reg = <0x1e78f000 0x20>; reg-shift = <2>; interrupts = <34>; clocks = <&clk_uart>; @@ -319,18 +320,17 @@ uart5: serial@1e784000 { compatible = "ns16550a"; - reg = <0x1e784000 0x1000>; + reg = <0x1e784000 0x20>; reg-shift = <2>; interrupts = <10>; clocks = <&clk_uart>; - current-speed = <38400>; no-loopback-test; status = "disabled"; }; - uart6: serial@1e787000 { - compatible = "ns16550a"; - reg = <0x1e787000 0x1000>; + vuart: vuart@1e787000 { + compatible = "aspeed,ast2500-vuart"; + reg = <0x1e787000 0x40>; reg-shift = <2>; interrupts = <10>; clocks = <&clk_uart>;