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[209.132.180.67]) by mx.google.com with ESMTP id b34si1394373plc.58.2017.09.20.06.39.59; Wed, 20 Sep 2017 06:39:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=BoJV1AlP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751800AbdITNj5 (ORCPT + 26 others); Wed, 20 Sep 2017 09:39:57 -0400 Received: from mail-wr0-f182.google.com ([209.85.128.182]:51916 "EHLO mail-wr0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751636AbdITNjq (ORCPT ); Wed, 20 Sep 2017 09:39:46 -0400 Received: by mail-wr0-f182.google.com with SMTP id z39so2191501wrb.8 for ; Wed, 20 Sep 2017 06:39:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Jvq5yukTW2sg8adn9ot96tjUKuNWYRghDsvSrvXNJOM=; b=BoJV1AlPKCsLW+G774VtisjHgiYscFyqIcbeCJbT/kcykLEE8OSgkG/pjgGiU2045s rZPrZjdVQ7wxw44n/OaCRrR9TZlZyfFPhZVcRADceuVTYRKwmAmvn9J9Od1vn6/4cyJu FYAbLlyOX3NGJpOOIFEPMsy+COkI7FJSFC/6HZfm0fgz+cY5sgURPmSiOySsiwbfEica o03hai5duxJSsyDOsgkPG0uYT+NxIGLgLZK2WuXWgVKKi71qDcKXT4XnF5jVYHJ1eXcO ADebpdNpTGqXix983YOQk4uOdBsiZPPMqrAQ3OVtB/Z15X41a4F3tsCuqr+MDi7JKS/R aFEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Jvq5yukTW2sg8adn9ot96tjUKuNWYRghDsvSrvXNJOM=; b=WVNcNATmvfTDFmyOMyazXL1DCjyd8Y3PEfmBk+78fnbv3jyftja7oNasin7cgiUiF8 erSAMZWwk8Ysb2ViaKYj6AxXIVe+OdaHs+IT20dcLOIa4BMgsWXUnoryGKwnpflXs/Db JE+MbvpUCYKUzWvjACGVuulVn05A8o7XE7BqngEny7YGQaXYotxI+JRxePuqdKB7T1Mk zR+vh9TFomHiBOVAHABRzK9XHqiz+bYE5d8ZyEc5C8wXZFXcq/MiYdNgli8jG+FhFzWr IoTxNHGESyyt2r11d/oSKQ6ojmNSoVDv+c6eKT2TqcBYVq5hpxteaZaY8lI0WcBfl7uV /Kfw== X-Gm-Message-State: AHPjjUh0qusTZ5ecaVD2ZjjJQr5Fy59SmdqibV/Hc8QMSDoRjwV/QO/I pLaOG7VssIFPGbp8NmxVxX5LnA== X-Google-Smtp-Source: AOwi7QA8eJhqLa5xkSnYp5E55l3mcx/2jhxwUXQLJxTrO45dXjJjxgVm37Kt8NW3f+HAmDRK6fpiJQ== X-Received: by 10.223.180.82 with SMTP id v18mr5100404wrd.61.1505914785114; Wed, 20 Sep 2017 06:39:45 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id a39sm1938888wrc.48.2017.09.20.06.39.44 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 20 Sep 2017 06:39:44 -0700 (PDT) From: Jerome Brunet To: Linus Walleij , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 8/8] pinctrl: meson-gxbb: add missing GPIOX_22 pin Date: Wed, 20 Sep 2017 15:39:27 +0200 Message-Id: <20170920133927.17390-9-jbrunet@baylibre.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170920133927.17390-1-jbrunet@baylibre.com> References: <20170920133927.17390-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org GPIOX_22 is declared as a gpio but the id is no present in the pin table. This hole trigger an error while reading the pingroup debugfs entry GPIOX_22 is no routed externally. For all we know, it could an internal pin of SoC Signed-off-by: Jerome Brunet --- drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 1 + 1 file changed, 1 insertion(+) -- 2.13.5 diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index 1305d68b0954..62483b67f114 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -136,6 +136,7 @@ static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = { MESON_PIN(GPIOX_19), MESON_PIN(GPIOX_20), MESON_PIN(GPIOX_21), + MESON_PIN(GPIOX_22), MESON_PIN(GPIOCLK_0), MESON_PIN(GPIOCLK_1),