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[209.132.180.67]) by mx.google.com with ESMTP id o14si1374673pli.164.2017.09.20.06.40.02; Wed, 20 Sep 2017 06:40:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=1GbxRyVI; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751819AbdITNj7 (ORCPT + 26 others); Wed, 20 Sep 2017 09:39:59 -0400 Received: from mail-wm0-f54.google.com ([74.125.82.54]:46574 "EHLO mail-wm0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751735AbdITNjq (ORCPT ); Wed, 20 Sep 2017 09:39:46 -0400 Received: by mail-wm0-f54.google.com with SMTP id i189so7343862wmf.1 for ; Wed, 20 Sep 2017 06:39:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rh7olZQZpO9yhCEfzPqJjkHK3m4iek1g7j7EnBxz4TM=; b=1GbxRyVIG6ygKAAHdPd6nurq4bnehAT0Ue4KOrdMz4C5bHe6djWK/d7L3h3F4dDlzW 8qIIrThhKIv0SsFfRg6xGiAnpHZWedlWXOXKguYDKNgBjXCSH8CGPbyKeyKL9zD6ijo7 cxvSUhvZ7OK9enKHCS2sfyEFsGBklKsMQxfe92ClqHqcgHitzoP51tOSw2BtLKYlEXVJ t0DSD590dwGChai6R4gByaoH61fPkIZ5HXMTkYGJJlLk5h5E3yVb2qZQRDeIJN3W/8ek Qno6ln3ffTslhsKdeo1dBdqwTy2byI6+HzSpr5XDvKjWTlwvSqlbJiSRkeSVCrdenJ+x fTNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rh7olZQZpO9yhCEfzPqJjkHK3m4iek1g7j7EnBxz4TM=; b=o/cx5Zl4B5tN1ybTIxLgWLFICOdYsx7fWifhnb/MaSpC3pzHdC8jUyRGpBstFWEsxD pytxojkk9fsL0MvHDn/uHwFVle+hCND/KeUF8/0F8IB48MunNyEznbeT5Ah6tYOBAzYs UhRjzoFdlzNVwKNBXPkCD4WuwpkkNyVrQNwaZPUYsyESpdG8V8x/sMBzNyUye2Bz0OSK 9zUsD2KMazqqWOL0FxYzn1Xg4eT7RE4Yr5W0AnBMmvpZ4wbNm2mhqTun9UKi0RcELGiM hZ2/HSZOCaFGUR851hs+ZoGYJ5hXyU7BCWkMy7sWVjuK3o3Dfq8JoxXh7GbUL8JYmdI0 bdxw== X-Gm-Message-State: AHPjjUh/4nJk+U/+dRfQ9E41y33LTlSnWihDN/iH45VEf1rwP1643/kR Vjc/Vhmqe82duXoUZt1zIWGQ/Q== X-Google-Smtp-Source: AOwi7QC3CwleIMRbAdWrbSHDP0HBFyfet/9bYHLJFPqb22gDEOxfEkDsmiS8uTWJJIg8gW1572bmIw== X-Received: by 10.28.142.147 with SMTP id q141mr3963618wmd.155.1505914784022; Wed, 20 Sep 2017 06:39:44 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id a39sm1938888wrc.48.2017.09.20.06.39.43 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 20 Sep 2017 06:39:43 -0700 (PDT) From: Jerome Brunet To: Linus Walleij , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Martin Blumenstingl Subject: [PATCH 7/8] pinctrl: meson-gx: TEST_N belongs to the AO controller Date: Wed, 20 Sep 2017 15:39:26 +0200 Message-Id: <20170920133927.17390-8-jbrunet@baylibre.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170920133927.17390-1-jbrunet@baylibre.com> References: <20170920133927.17390-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On meson-gx platforms, TEST_N has been incorrectly declared in the EE controller while it belongs to AO controller. Move the pin to the appropriate controller Signed-off-by: Jerome Brunet --- drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 8 ++++---- drivers/pinctrl/meson/pinctrl-meson-gxl.c | 8 ++++---- include/dt-bindings/gpio/meson-gxbb-gpio.h | 2 +- include/dt-bindings/gpio/meson-gxl-gpio.h | 2 +- 4 files changed, 10 insertions(+), 10 deletions(-) -- 2.13.5 diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index 8e0d6e4a31b4..1305d68b0954 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -141,8 +141,6 @@ static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = { MESON_PIN(GPIOCLK_1), MESON_PIN(GPIOCLK_2), MESON_PIN(GPIOCLK_3), - - MESON_PIN(GPIO_TEST_N), }; static const unsigned int emmc_nand_d07_pins[] = { @@ -258,6 +256,8 @@ static const struct pinctrl_pin_desc meson_gxbb_aobus_pins[] = { MESON_PIN(GPIOAO_11), MESON_PIN(GPIOAO_12), MESON_PIN(GPIOAO_13), + + MESON_PIN(GPIO_TEST_N), }; static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 }; @@ -596,8 +596,6 @@ static const char * const gpio_periphs_groups[] = { "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19", "GPIOX_20", "GPIOX_21", "GPIOX_22", - - "GPIO_TEST_N", }; static const char * const emmc_groups[] = { @@ -706,6 +704,8 @@ static const char * const gpio_aobus_groups[] = { "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11", "GPIOAO_12", "GPIOAO_13", + + "GPIO_TEST_N", }; static const char * const uart_ao_groups[] = { diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c index 0d90ddab6ddd..04334e807170 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c @@ -122,8 +122,6 @@ static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = { MESON_PIN(GPIOCLK_0), MESON_PIN(GPIOCLK_1), - - MESON_PIN(GPIO_TEST_N), }; static const unsigned int emmc_nand_d07_pins[] = { @@ -263,6 +261,8 @@ static const struct pinctrl_pin_desc meson_gxl_aobus_pins[] = { MESON_PIN(GPIOAO_7), MESON_PIN(GPIOAO_8), MESON_PIN(GPIOAO_9), + + MESON_PIN(GPIO_TEST_N), }; static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 }; @@ -587,8 +587,6 @@ static const char * const gpio_periphs_groups[] = { "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9", "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14", "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", - - "GPIO_TEST_N", }; static const char * const emmc_groups[] = { @@ -703,6 +701,8 @@ static const char * const tsin_a_groups[] = { static const char * const gpio_aobus_groups[] = { "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", + + "GPIO_TEST_N", }; static const char * const uart_ao_groups[] = { diff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h index 58654fd7aa1e..43a68a1110f0 100644 --- a/include/dt-bindings/gpio/meson-gxbb-gpio.h +++ b/include/dt-bindings/gpio/meson-gxbb-gpio.h @@ -29,6 +29,7 @@ #define GPIOAO_11 11 #define GPIOAO_12 12 #define GPIOAO_13 13 +#define GPIO_TEST_N 14 #define GPIOZ_0 0 #define GPIOZ_1 1 @@ -149,6 +150,5 @@ #define GPIOCLK_1 116 #define GPIOCLK_2 117 #define GPIOCLK_3 118 -#define GPIO_TEST_N 119 #endif diff --git a/include/dt-bindings/gpio/meson-gxl-gpio.h b/include/dt-bindings/gpio/meson-gxl-gpio.h index 684d0d7add1c..01f2a2abd35e 100644 --- a/include/dt-bindings/gpio/meson-gxl-gpio.h +++ b/include/dt-bindings/gpio/meson-gxl-gpio.h @@ -25,6 +25,7 @@ #define GPIOAO_7 7 #define GPIOAO_8 8 #define GPIOAO_9 9 +#define GPIO_TEST_N 10 #define GPIOZ_0 0 #define GPIOZ_1 1 @@ -126,6 +127,5 @@ #define GPIOX_18 97 #define GPIOCLK_0 98 #define GPIOCLK_1 99 -#define GPIO_TEST_N 100 #endif