From patchwork Wed Aug 30 14:41:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dietmar Eggemann X-Patchwork-Id: 111318 Delivered-To: patch@linaro.org Received: by 10.140.95.112 with SMTP id h103csp1040363qge; Wed, 30 Aug 2017 07:42:30 -0700 (PDT) X-Received: by 10.84.238.138 with SMTP id v10mr2243239plk.185.1504104150704; Wed, 30 Aug 2017 07:42:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1504104150; cv=none; d=google.com; s=arc-20160816; b=e1dATJsoM6KEYFOg0XYQ1WNegW2GK/seJdBQdwvoJ5c9t8JkdDe1m401Q+PH1Pt6o5 W+jf0qCmYc3sTxxpn3IHr9DJmADj/B4+/zZcpfMqkXalSxtN9cd3FpgCcJGbt3h1vDjc PTJndDT/ruQ1h/Fa/4gesluelezHheNXvi4hV8/+xmSHjxe7ZqY6W/DuwdrFOaWqEe5a yKcefEE2AKKDIBzwNjDcTYD0SDBjt+q1YCNrEO9dV0HUvPYymX4jzgjZYUkF3Md6ekCF 7DyguFxgKOk48L0qwfITK+bpvzepJZQn9dm7PSN6Ox/38vfOlcwNxaq3pzZousV7yRc1 DRxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=iWE/oQCbC19xNKWM/JYBWF+oiYYLrFHWNh0bYFF47ZA=; b=NK+fGfLIw9AQAmTnhIiY66ABR6UojaGyk8soNO1n4cfRRsbnXOE1nb2njKoI4qlpS2 nAOYZJFFuPTez6Ub1G1aGdr4zQJ76tGAXp/50tzpWlknQcMQl+W2ud40waDh7vD7OQFI dvKSwB/bDrFjdLCr/IRzs2fPPhhI5MJICf49/xYWFCpTPprJwmkdTYOUOAZcv20t/rNs YPTX4YIOCwoxVuMy0GFnGSGTPoDwId79ygyAE7hcbzaAvbJDbOQcwKWelkKDNpRqG0rL +GC9DCJfRYcb2+hN/hMU5+oGmyWk4d2bfFx2BxbuQgzQIn0HWlqH8e3Qm8+DZ1Tw93A/ Fthw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i35si4726245plg.483.2017.08.30.07.42.30; Wed, 30 Aug 2017 07:42:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751805AbdH3Om1 (ORCPT + 26 others); Wed, 30 Aug 2017 10:42:27 -0400 Received: from foss.arm.com ([217.140.101.70]:45544 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751694AbdH3Ols (ORCPT ); Wed, 30 Aug 2017 10:41:48 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4116215BE; Wed, 30 Aug 2017 07:41:48 -0700 (PDT) Received: from e107985-lin.cambridge.arm.com (e107985-lin.cambridge.arm.com [10.1.210.41]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2A9B73F483; Wed, 30 Aug 2017 07:41:46 -0700 (PDT) From: Dietmar Eggemann To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Russell King , Rob Herring , Mark Rutland , Kukjin Kim , Krzysztof Kozlowski , Vincent Guittot , Juri Lelli Subject: [PATCH 2/4] arm: dts: exynos: add exynos5420 cpu capacity-dmips-mhz information Date: Wed, 30 Aug 2017 15:41:18 +0100 Message-Id: <20170830144120.9312-3-dietmar.eggemann@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170830144120.9312-1-dietmar.eggemann@arm.com> References: <20170830144120.9312-1-dietmar.eggemann@arm.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following 'capacity-dmips-mhz' dt property values are used: Cortex-A15: 1024, Cortex-A7: 539 They have been derived from the cpu_efficiency values: Cortex-A15: 3891, Cortex-A7: 2048 by scaling them so that the Cortex-A15s (big cores) use 1024. The cpu_efficiency values were originally derived from the "Big.LITTLE Processing with ARM Cortex™-A15 & Cortex-A7" white paper (http://www.cl.cam.ac.uk/~rdm34/big.LITTLE.pdf). Table 1 lists 1.9x (3891/2048) as the Cortex-A15 vs Cortex-A7 performance ratio for the Dhrystone benchmark. The following platforms are affected once cpu-invariant accounting support is re-connected to the task scheduler: arndale-octa, peach-pi, peach-pit, smdk5420 The patch has been tested on Samsung Chromebook 2 13" (peach-pi, Exynos 5800). $ cat /sys/devices/system/cpu/cpu*/cpu_capacity 1024 1024 1024 1024 389 389 389 389 The Cortex-A15 vs Cortex-A7 performance ratio is 1024/389 = 2.63. The values derived with the 'cpu_efficiency/clock-frequency dt property' solution are: $ cat /sys/devices/system/cpu/cpu*/cpu_capacity 1535 1535 1535 1535 448 448 448 448 The Cortex-A15 vs Cortex-A7 performance ratio is 1535/448 = 3.43. The discrepancy between 2.63 and 3.43 is due to the false assumption when using the 'cpu_efficiency/clock-frequency dt property' solution that the max cpu frequency of the little cpus is 1 GHZ and not 1.3 GHz. The Cortex-A7 cluster runs with a max cpu frequency of 1.3 GHZ whereas the 'clock-frequency' property value is set to 1 GHz. 3.43/1.3 = 2.64 $ cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_max_freq 1800000 1800000 1800000 1800000 1300000 <-- max cpu frequency of the Cortex-A7s (little cores) 1300000 1300000 1300000 Running another benchmark (single-threaded sysbench affine to the individual cpus) with performance cpufreq governor on the Samsung Chromebook 2 13" showed the following numbers: $ for i in `seq 0 7`; do taskset -c $i sysbench --test=cpu --num-threads=1 --max-time=10 run | grep "total number of events:"; done total number of events: 1083 total number of events: 1085 total number of events: 1085 total number of events: 1085 total number of events: 454 total number of events: 454 total number of events: 454 total number of events: 454 The Cortex-A15 vs Cortex-A7 performance ratio is 2.39, i.e. very close to the one derived from the Dhrystone based one of the "Big.LITTLE Processing with ARM Cortex™-A15 & Cortex-A7" white paper (2.63). We don't aim for exact values for the cpu capacity values. Besides the CPI (Cycles Per Instruction), the instruction mix and whether the system runs cpu-bound or memory-bound has an impact on the cpu capacity values derived from these benchmark results. Cc: Rob Herring Cc: Mark Rutland Cc: Russell King Cc: Kukjin Kim Cc: Krzysztof Kozlowski Signed-off-by: Dietmar Eggemann --- arch/arm/boot/dts/exynos5420-cpus.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.11.0 diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi index 5c052d7ff554..d7d703aa1699 100644 --- a/arch/arm/boot/dts/exynos5420-cpus.dtsi +++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi @@ -36,6 +36,7 @@ cooling-min-level = <0>; cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; }; cpu1: cpu@1 { @@ -48,6 +49,7 @@ cooling-min-level = <0>; cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; }; cpu2: cpu@2 { @@ -60,6 +62,7 @@ cooling-min-level = <0>; cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; }; cpu3: cpu@3 { @@ -72,6 +75,7 @@ cooling-min-level = <0>; cooling-max-level = <11>; #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <1024>; }; cpu4: cpu@100 { @@ -85,6 +89,7 @@ cooling-min-level = <0>; cooling-max-level = <7>; #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; }; cpu5: cpu@101 { @@ -97,6 +102,7 @@ cooling-min-level = <0>; cooling-max-level = <7>; #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; }; cpu6: cpu@102 { @@ -109,6 +115,7 @@ cooling-min-level = <0>; cooling-max-level = <7>; #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; }; cpu7: cpu@103 { @@ -121,6 +128,7 @@ cooling-min-level = <0>; cooling-max-level = <7>; #cooling-cells = <2>; /* min followed by max */ + capacity-dmips-mhz = <539>; }; }; };