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[209.132.180.67]) by mx.google.com with ESMTP id o3si22760549pld.309.2017.08.03.03.48.50; Thu, 03 Aug 2017 03:48:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.b=rwmEAmSt; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752140AbdHCKss (ORCPT + 25 others); Thu, 3 Aug 2017 06:48:48 -0400 Received: from mail-qt0-f194.google.com ([209.85.216.194]:34173 "EHLO mail-qt0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752101AbdHCKsi (ORCPT ); Thu, 3 Aug 2017 06:48:38 -0400 Received: by mail-qt0-f194.google.com with SMTP id i19so848169qte.1; Thu, 03 Aug 2017 03:48:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7x17j+tmHjPeQbt2nd+mw2MvVBcx9AjRm2d2PUu63Sc=; b=rwmEAmStvhABcocw4zEebXEidGj9YAeaP7zEh1uOwrNJf1ISTr1XKPZ+vQJ4pc1p1v jj5zYxVhtlKlSMHRhJJgRcj6VECVh/H8lATwWjNsUUMdiAir/x54yIkL5NhY1rIBoL7N ErV7NqNsAsv8kiq92iO7hBIJmyTkUAZwFxJ1FD0KpipLpvbJvHIgQBW2MCzbJPo/RGNR UmTJhRk/2r8G3bca6u3/XW8jz2dtjtv6nczHTyRUEWnGYqgRQ9DET2UmmbAR1DnPp0s7 0GZVWoEgRrXQKnIjolBdoaI5MTIVEKONKfimh4AUlQHBAHhFQYLBjAwxjXUwmJYXu54u 9tMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7x17j+tmHjPeQbt2nd+mw2MvVBcx9AjRm2d2PUu63Sc=; b=nJew8xkxUtx2qJPg9i8yiBdwB44OlKNSWVNWSFIG6YZ6O7CF2fki1lAGTJN983o7Sj 9n1tCpCNL3/KDrScffTgKuB2NOlcQSf+a6n7Pu4gRdyKW8E8sx5b6jZaabCiuu5Vxu84 i1fiUYshFRHLHbeF1mT7R7RzLY4RNlcLFUkeYwC20G8NuBOBItpRJp7ecsaLh7J/d3gM f1G8xKcXZiIpwswm994TcC2hxUMDG1zNPPGJ+CHmMsi1qPpgIqSv6NNeXWA0RKfHVloF ZUdsVmrHrtgTrFXq+/J5mXRXOp58yJ0UKymAZU7ZkEXGOhPfj8XjQL1u+FOvpeygrcS6 xC4A== X-Gm-Message-State: AHYfb5j3ClTBbLvKmvZK2TO8oxkkDePk4sMT5Nj4R29virm9/jz+XGkZ Qtk6Fp4q8mCkxHRO3NI= X-Received: by 10.200.48.233 with SMTP id w38mr1503504qta.168.1501757318024; Thu, 03 Aug 2017 03:48:38 -0700 (PDT) Received: from localhost ([2601:184:4780:aac0:25f8:dd96:a084:785a]) by smtp.gmail.com with ESMTPSA id w46sm9850527qtc.16.2017.08.03.03.48.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 Aug 2017 03:48:36 -0700 (PDT) From: Rob Clark To: iommu@lists.linux-foundation.org, linux-arm-msm@vger.kernel.org Cc: Archit Taneja , Rob Herring , Will Deacon , Sricharan , Mark Rutland , Robin Murphy , Stanimir Varbanov , Rob Clark , Joerg Roedel , linux-kernel@vger.kernel.org Subject: [PATCH 4/4] iommu: qcom: initialize secure page table Date: Thu, 3 Aug 2017 06:47:52 -0400 Message-Id: <20170803104800.18624-5-robdclark@gmail.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170803104800.18624-1-robdclark@gmail.com> References: <20170803104800.18624-1-robdclark@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Stanimir Varbanov This basically gets the secure page table size, allocates memory for secure pagetables and passes the physical address to the trusted zone. Signed-off-by: Stanimir Varbanov Signed-off-by: Rob Clark Tested-by: Archit Taneja --- drivers/iommu/qcom_iommu.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) -- 2.13.0 diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c index 860cad1cb167..48b62aa52787 100644 --- a/drivers/iommu/qcom_iommu.c +++ b/drivers/iommu/qcom_iommu.c @@ -604,6 +604,51 @@ static void qcom_iommu_disable_clocks(struct qcom_iommu_dev *qcom_iommu) clk_disable_unprepare(qcom_iommu->iface_clk); } +static int qcom_iommu_sec_ptbl_init(struct device *dev) +{ + size_t psize = 0; + unsigned int spare = 0; + void *cpu_addr; + dma_addr_t paddr; + unsigned long attrs; + static bool allocated = false; + int ret; + + if (allocated) + return 0; + + ret = qcom_scm_iommu_secure_ptbl_size(spare, &psize); + if (ret) { + dev_err(dev, "failed to get iommu secure pgtable size (%d)\n", + ret); + return ret; + } + + dev_info(dev, "iommu sec: pgtable size: %zu\n", psize); + + attrs = DMA_ATTR_NO_KERNEL_MAPPING; + + cpu_addr = dma_alloc_attrs(dev, psize, &paddr, GFP_KERNEL, attrs); + if (!cpu_addr) { + dev_err(dev, "failed to allocate %zu bytes for pgtable\n", + psize); + return -ENOMEM; + } + + ret = qcom_scm_iommu_secure_ptbl_init(paddr, psize, spare); + if (ret) { + dev_err(dev, "failed to init iommu pgtable (%d)\n", ret); + goto free_mem; + } + + allocated = true; + return 0; + +free_mem: + dma_free_attrs(dev, psize, cpu_addr, paddr, attrs); + return ret; +} + static int get_asid(const struct device_node *np) { u32 reg; @@ -700,6 +745,17 @@ static struct platform_driver qcom_iommu_ctx_driver = { .remove = qcom_iommu_ctx_remove, }; +static bool qcom_iommu_has_secure_context(struct qcom_iommu_dev *qcom_iommu) +{ + struct device_node *child; + + for_each_child_of_node(qcom_iommu->dev->of_node, child) + if (of_device_is_compatible(child, "qcom,msm-iommu-v1-sec")) + return true; + + return false; +} + static int qcom_iommu_device_probe(struct platform_device *pdev) { struct device_node *child; @@ -744,6 +800,14 @@ static int qcom_iommu_device_probe(struct platform_device *pdev) return -ENODEV; } + if (qcom_iommu_has_secure_context(qcom_iommu)) { + ret = qcom_iommu_sec_ptbl_init(dev); + if (ret) { + dev_err(dev, "cannot init secure pg table(%d)\n", ret); + return ret; + } + } + platform_set_drvdata(pdev, qcom_iommu); pm_runtime_enable(dev);