From patchwork Fri Jun 30 16:03:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 106742 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp2518165qge; Fri, 30 Jun 2017 09:05:44 -0700 (PDT) X-Received: by 10.101.85.132 with SMTP id j4mr22228775pgs.177.1498838744469; Fri, 30 Jun 2017 09:05:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1498838744; cv=none; d=google.com; s=arc-20160816; b=Gr6fEOIvWyEwxvI6WC6N9z4qPjHxpef0JVgxZ5C8HDe2SloO6czEqmDmQg+qm7MSku kXpVTy303zlUHZoYAh94vSjW9tacOAgDmn11YIkQcwDWZR/ejwKtVpNp4KHmkp8qik6Q wWkYjwh3AmHPbfCaN+LPlu+Cia8AvEY4BHtgaVjnauWnhYN8/N7GL2/+Wl2sFGAuAz+Z AiPtJSy2/oW9n8rvHD0iTWoKT0wpS5BZuEEBaxjC56rDgpfIYX7OTwj9T5+eSBihc38x M40m3Eti4N0AjD4oWSx26u5mh+4Hs6NeBbL/+0PATA76GUxCyYc+YErwI/RQuIsT8Nuu 6cMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :arc-authentication-results; bh=ci/zc7CZVZtjqKC/jWu8W3DngbA3tGeQdwny4z/DNrk=; b=gSZiG054ydUW8d6ebta0a6+2rWLoHhqKr4Ea8D13HkxSHJ6DFwMYTyvxlJoaOGR534 y1vBGvjHBcVtzxzgW3pFuaMC+PGW2DCraqXvRAlL2pEaHKT3DJYrVp31r2YPZO2zEBiJ 4vRHQhWRVWSyP77+cCslxi5f/JyGtsRuVtrbUE4uMhNqbTbURHyGCN7+iDHlIMYI1qk2 Zsar9a0RKToKU3jTpUevc6FSzpZypqxpzpp0u0EGi0zucVLbRK2mid5kRimnWJFIJo95 Awc7pm1p9vDOBySTbiMZboIuce+b8E8RIdr6XXn0qbeWhTOuz1xAyUNPoQRH8FV0ch94 CGZA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v10si6431327plg.332.2017.06.30.09.05.43; Fri, 30 Jun 2017 09:05:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751890AbdF3QFg (ORCPT + 25 others); Fri, 30 Jun 2017 12:05:36 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:56601 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750975AbdF3QFf (ORCPT ); Fri, 30 Jun 2017 12:05:35 -0400 Received: from wuerfel.lan ([5.56.224.194]) by mrelayeu.kundenserver.de (mreue102 [212.227.15.145]) with ESMTPA (Nemesis) id 0M4Hw3-1diMfg30zL-00rpU0; Fri, 30 Jun 2017 18:04:51 +0200 From: Arnd Bergmann To: Kees Cook Cc: kernel-hardening@lists.openwall.com, Arnd Bergmann , Russell King , Will Deacon , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] ARM: fix randomized task_struct Date: Fri, 30 Jun 2017 18:03:59 +0200 Message-Id: <20170630160450.4093529-1-arnd@arndb.de> X-Mailer: git-send-email 2.9.0 X-Provags-ID: V03:K0:JDfu+TmyaAGQyqXf61UjVXmCXhUmwCMDWdglORA1cynLDqpBoxk kyUQ/kQmQAVHJENgOGyLVgfJ/BWHQAkpaFyZs7l4YakJ8NFtRH1uM5ZJugZIt7KE7MbOK3b ZU13KNbFw75oVMnbIoOXAsz2vwCh7PmVnqG3S3AdJ6RrWE3vWGQsKu90Gi2VXnZQct4B1YM PAQ9aSUXTLHRWCQwQT2NQ== X-UI-Out-Filterresults: notjunk:1; V01:K0:O/8zRvQFBVg=:jc7MGFed5YhJyrif87qW1s sFcPmFHaW9H7bZhDIIzq0fNZoqJlSOJsGisVWKeh8D/3IC/rowu7klC+inTBTeiZPr2Ouofqn 7kBwnvs2dT5gHhUkdrQ016Z7muWLLmC4LvfI8r0lyGsEhcEG/vZVFNyQCqSHb+7YFoTKQ2v9N F2m2A2SlmOIXb7PaRczra/vqV91MOu97E/u1QNGf44UxO5NLl5zJMiJffovYFFwSO1pCirZ39 vMEP0cfXSkMt/bd3YNaWijGkBzB1M6193afnUw70yKN2ZTDwYiuGntE9C2jonjsSWim4zjKom hW+8DmzsJsZ6yTluC4k3qquNOlJrmwNU866k6o3WQFRG+2p8ZhSu7s4pBUapZTOu4CHqRB1Ai nZSjy+y4ypjKKiglX1hskHwurNTwBgp4+eN28sgw+Ek6NLoBBvchb+C9+nlyszkm+s7ZLoeF+ Ed8Hlrn0qed+D1TPVbG7sGqMi5kI7SEzxSlaN7a7n2f1riRdXHbLXbuxtLaIcr1G5k9K6tInP qz69mJGzFxmrBKe/jciwvS9PEyzumfzwCdF6OgwPCslLNC+0fRcRhzkf4xBhC5e7XG7QDUxug gd1JtiJbQSR3y4ZnIuN2MG1xE1ndlAqrmfAkUjFdNT/abNifBb7coyiqxDDzXE0bcV+CFeVap 25qSX6pLeVx8oAXow8k3lAbJ+jsl1IGnn6OCMROfXFYFzmOlWdrpnggeAj1ESYrCrMjg= Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org With the new task struct randomization, we can run into a build failure for certain random seeds: arch/arm/kernel/entry-armv.S: Assembler messages: arch/arm/kernel/entry-armv.S:803: Error: bad immediate value for offset (4096) Only two constants in asm-offset.h are affected, and I'm changing both of them here to work correctly in all configurations. One more macro has the problem, but is currently unused, so this removes it instead of adding complexity. Suggested-by: Ard Biesheuvel Fixes: c33d8b12fbbd ("task_struct: Allow randomized layout") Signed-off-by: Arnd Bergmann --- v2: define a more appropriate macro instead of PAGE_MASK, fix always-true comparison to test the right thing --- arch/arm/include/asm/assembler.h | 2 ++ arch/arm/kernel/entry-armv.S | 5 ++++- arch/arm/mm/proc-macros.S | 10 ++++------ 3 files changed, 10 insertions(+), 7 deletions(-) -- 2.9.0 Reviewed-by: Kees Cook Tested-by: Kees Cook diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 68b06f9c65de..ad301f107dd2 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -87,6 +87,8 @@ #define CALGN(code...) #endif +#define IMM12_MASK 0xfff + /* * Enable and disable interrupts */ diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 9f157e7c51e7..c731f0d2b2af 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -797,7 +797,10 @@ ENTRY(__switch_to) #if defined(CONFIG_CC_STACKPROTECTOR) && !defined(CONFIG_SMP) ldr r7, [r2, #TI_TASK] ldr r8, =__stack_chk_guard - ldr r7, [r7, #TSK_STACK_CANARY] + .if (TSK_STACK_CANARY > IMM12_MASK) + add r7, r7, #TSK_STACK_CANARY & ~IMM12_MASK + .endif + ldr r7, [r7, #TSK_STACK_CANARY & IMM12_MASK] #endif #ifdef CONFIG_CPU_USE_DOMAINS mcr p15, 0, r6, c3, c0, 0 @ Set domain register diff --git a/arch/arm/mm/proc-macros.S b/arch/arm/mm/proc-macros.S index 0d40c285bd86..f944836da8a2 100644 --- a/arch/arm/mm/proc-macros.S +++ b/arch/arm/mm/proc-macros.S @@ -25,11 +25,6 @@ ldr \rd, [\rn, #VMA_VM_FLAGS] .endm - .macro tsk_mm, rd, rn - ldr \rd, [\rn, #TI_TASK] - ldr \rd, [\rd, #TSK_ACTIVE_MM] - .endm - /* * act_mm - get current->active_mm */ @@ -37,7 +32,10 @@ bic \rd, sp, #8128 bic \rd, \rd, #63 ldr \rd, [\rd, #TI_TASK] - ldr \rd, [\rd, #TSK_ACTIVE_MM] + .if (TSK_ACTIVE_MM > IMM12_MASK) + add \rd, \rd, #TSK_ACTIVE_MM & ~IMM12_MASK + .endif + ldr \rd, [\rd, #TSK_ACTIVE_MM & IMM12_MASK] .endm /*