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[209.132.180.67]) by mx.google.com with ESMTP id x77si1431951pfa.50.2017.06.16.05.48.06; Fri, 16 Jun 2017 05:48:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.b=PebVor2F; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753883AbdFPMrw (ORCPT + 25 others); Fri, 16 Jun 2017 08:47:52 -0400 Received: from fllnx209.ext.ti.com ([198.47.19.16]:38593 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753782AbdFPMrn (ORCPT ); Fri, 16 Jun 2017 08:47:43 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v5GCk6i5022308; Fri, 16 Jun 2017 07:46:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1497617166; bh=RXBT527PuYMVD2lgJK6auY2ATrWoK46Om/LizhLs11o=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=PebVor2FdDl1TSH1BSr0swt2OsUnz+TceBlitq3F3UGG5g9QgJZ8KADAlzCuUgbeH ZuGyyLvo+RSuAWOBkDxIltUaZApXcxTIjrq+3n7Q+DhAAEwOCd/7qJBLeU+8r6gjU6 x0XWSqieMdG1me+I89+bvNOh02Qx5Qt/pcu8yNjw= Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v5GCk10E017383; Fri, 16 Jun 2017 07:46:01 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Fri, 16 Jun 2017 07:46:00 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v5GCjjBe000652; Fri, 16 Jun 2017 07:45:56 -0500 From: Kishon Vijay Abraham I To: Ulf Hansson , Rob Herring , Tony Lindgren , CC: Russell King , Ravikumar Kattekola , , , , , , Subject: [PATCH 02/16] mmc: host: omap_hsmmc: Separate setting voltage capabilities from bus power Date: Fri, 16 Jun 2017 18:15:30 +0530 Message-ID: <20170616124544.15046-3-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170616124544.15046-1-kishon@ti.com> References: <20170616124544.15046-1-kishon@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a separate function to set the voltage capabilities of the host controller. Voltage capabilities should be set only once during controller initialization but bus power can be changed every time there is a voltage switch and whenever a different card is inserted. This allows omap_hsmmc_conf_bus_power to be invoked every time there is a voltage switch. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Sekhar Nori --- drivers/mmc/host/omap_hsmmc.c | 28 +++++++++++++++++++--------- 1 file changed, 19 insertions(+), 9 deletions(-) -- 2.11.0 diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 48bb06788d9f..c9ea41bb4e3a 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -1799,25 +1799,34 @@ static int omap_hsmmc_configure_wake_irq(struct omap_hsmmc_host *host) return ret; } +static void omap_hsmmc_set_capabilities(struct omap_hsmmc_host *host) +{ + u32 val; + + val = OMAP_HSMMC_READ(host->base, CAPA); + + /* Only MMC1 supports 3.0V */ + if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) + val |= (VS30 | VS18); + else + val |= VS18; + + OMAP_HSMMC_WRITE(host->base, CAPA, val); +} + static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) { - u32 hctl, capa, value; + u32 hctl, value; /* Only MMC1 supports 3.0V */ - if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { + if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) hctl = SDVS30; - capa = VS30 | VS18; - } else { + else hctl = SDVS18; - capa = VS18; - } value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); - value = OMAP_HSMMC_READ(host->base, CAPA); - OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); - /* Set SD bus power bit */ set_sd_bus_power(host); } @@ -2124,6 +2133,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev) mmc->pm_caps |= mmc_pdata(host)->pm_caps; + omap_hsmmc_set_capabilities(host); omap_hsmmc_conf_bus_power(host); host->rx_chan = dma_request_chan(&pdev->dev, "rx");