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[209.132.180.67]) by mx.google.com with ESMTP id w18si1885448pfi.492.2017.06.16.05.49.24; Fri, 16 Jun 2017 05:49:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.b=W526nXnN; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753920AbdFPMtB (ORCPT + 25 others); Fri, 16 Jun 2017 08:49:01 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:60048 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753657AbdFPMrb (ORCPT ); Fri, 16 Jun 2017 08:47:31 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v5GCkuA6013778; Fri, 16 Jun 2017 07:46:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1497617216; bh=HE2YHkuBSCFNAD8n+oncktAkYplwIfJy+R7BZ9qqiO4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=W526nXnNqyYRIBjEX6ldWP8eLj65VdeJGgNcl2w3oFT/Xr9oZHNv69fo8lC9ITctp fRu6dIGMX9N04kvnqnAtnbNdVhVRvLApTNgZPpNl99rmEKseUPs52iFL4jWTCoweyb N0x3VLpwCRlAZLuH6FBi1/eErUf+npCMyfsSfgV0= Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v5GCkul4013233; Fri, 16 Jun 2017 07:46:56 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Fri, 16 Jun 2017 07:46:56 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v5GCjjBs000652; Fri, 16 Jun 2017 07:46:53 -0500 From: Kishon Vijay Abraham I To: Ulf Hansson , Rob Herring , Tony Lindgren , CC: Russell King , Ravikumar Kattekola , , , , , , Subject: [PATCH 16/16] ARM: dts: dra7: Add supported MMC/SD modes in MMC dt nodes Date: Fri, 16 Jun 2017 18:15:44 +0530 Message-ID: <20170616124544.15046-17-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170616124544.15046-1-kishon@ti.com> References: <20170616124544.15046-1-kishon@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On DRA7 family SoCs, MMC1 controller supports SDR104, SDR50, DDR50, SDR25 and SDR12 UHS modes (These UHS modes are not supported in beagle-x15 because it's not possible to switch IO lines supply voltage to 1.8v). MMC2 controller supports HS200 and DDR modes. (Since some of the boards like am57xx-evm reva3, beagle-x15 and am57xx idk has 3.3v line connected to IO lines, HS200 cannot be supported in these boards). MMC3 controller supports SDR12, SDR25 and SDR50 modes. MMC4 controller supports SDR12 and SDR25 modes. Add these supported modes in device-tree file. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Sekhar Nori --- arch/arm/boot/dts/am571x-idk.dts | 1 + arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts | 1 + arch/arm/boot/dts/am57xx-beagle-x15.dts | 6 ++++++ arch/arm/boot/dts/am57xx-idk-common.dtsi | 1 + arch/arm/boot/dts/dra7.dtsi | 14 ++++++++++++++ 5 files changed, 23 insertions(+) -- 2.11.0 diff --git a/arch/arm/boot/dts/am571x-idk.dts b/arch/arm/boot/dts/am571x-idk.dts index 875291d1bdd7..bdf39d47948f 100644 --- a/arch/arm/boot/dts/am571x-idk.dts +++ b/arch/arm/boot/dts/am571x-idk.dts @@ -90,4 +90,5 @@ pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>; + /delete-property/ mmc-hs200-1_8v; }; diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts index 5a77b334923d..17a25a74a005 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15-revb1.dts @@ -36,6 +36,7 @@ pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>; + /delete-property/ mmc-hs200-1_8v; }; /* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */ diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index d6689106d2a8..8d9bdf10a7be 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -25,6 +25,11 @@ pinctrl-1 = <&mmc1_pins_hs>; vmmc-supply = <&ldo1_reg>; + /delete-property/ sd-uhs-sdr104; + /delete-property/ sd-uhs-sdr50; + /delete-property/ sd-uhs-ddr50; + /delete-property/ sd-uhs-sdr25; + /delete-property/ sd-uhs-sdr12; }; &mmc2 { @@ -32,6 +37,7 @@ pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>; + /delete-property/ mmc-hs200-1_8v; }; /* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */ diff --git a/arch/arm/boot/dts/am57xx-idk-common.dtsi b/arch/arm/boot/dts/am57xx-idk-common.dtsi index 47b5b384809f..bf5bf8f52c79 100644 --- a/arch/arm/boot/dts/am57xx-idk-common.dtsi +++ b/arch/arm/boot/dts/am57xx-idk-common.dtsi @@ -413,6 +413,7 @@ bus-width = <8>; ti,non-removable; max-frequency = <96000000>; + /delete-property/ mmc-hs200-1_8v; }; &dcan1 { diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 52ce3fab483f..22b0ade96237 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1046,6 +1046,11 @@ status = "disabled"; pbias-supply = <&pbias_mmc_reg>; max-frequency = <192000000>; + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-ddr50; + sd-uhs-sdr25; + sd-uhs-sdr12; }; mmc2: mmc@480b4000 { @@ -1058,6 +1063,10 @@ dma-names = "tx", "rx"; status = "disabled"; max-frequency = <192000000>; + sd-uhs-sdr25; + sd-uhs-sdr12; + mmc-hs200-1_8v; + mmc-ddr-1_8v; }; mmc3: mmc@480ad000 { @@ -1071,6 +1080,9 @@ status = "disabled"; /* Errata i887 limits max-frequency of MMC3 to 64 MHz */ max-frequency = <64000000>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; }; mmc4: mmc@480d1000 { @@ -1083,6 +1095,8 @@ dma-names = "tx", "rx"; status = "disabled"; max-frequency = <192000000>; + sd-uhs-sdr12; + sd-uhs-sdr25; }; mmu0_dsp1: mmu@40d01000 {