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[209.132.180.67]) by mx.google.com with ESMTP id o61si1915237plb.154.2017.06.16.05.47.06; Fri, 16 Jun 2017 05:47:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.b=Gt/uOqua; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753756AbdFPMrD (ORCPT + 25 others); Fri, 16 Jun 2017 08:47:03 -0400 Received: from lelnx194.ext.ti.com ([198.47.27.80]:56961 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753704AbdFPMq5 (ORCPT ); Fri, 16 Jun 2017 08:46:57 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v5GCkUip021435; Fri, 16 Jun 2017 07:46:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1497617190; bh=oe6xfKcJ+vQQSoWRLiC32TnIrWNkGfa3sARPRBkqANc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Gt/uOquau4H2J7rId5w8R+CzyCvW2y0yUj7O+R0Ym/4ziNX11fKb+T2HnUokg8ScK UMZ2XhucHPPzHpOHNs1GcyWRcSqjTLACzGeleVAUCPnvz0RKDk9ohzP1V+8ZpyRVpe AUl7KcJjbv/T2o2Ez9sPblkoc/LC5PRBydZ4Kjig= Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v5GCkUBU018305; Fri, 16 Jun 2017 07:46:30 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Fri, 16 Jun 2017 07:46:29 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v5GCjjBl000652; Fri, 16 Jun 2017 07:46:27 -0500 From: Kishon Vijay Abraham I To: Ulf Hansson , Rob Herring , Tony Lindgren , CC: Russell King , Ravikumar Kattekola , , , , , , Subject: [PATCH 09/16] mmc: host: omap_hsmmc: Prepare *set_timing() to be used for iodelay setting Date: Fri, 16 Jun 2017 18:15:37 +0530 Message-ID: <20170616124544.15046-10-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170616124544.15046-1-kishon@ti.com> References: <20170616124544.15046-1-kishon@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org No functional change. Add separate case statements for certain timing like MMC_TIMING_SD_HS and MMC_TIMING_MMC_HS even though AC12_UHSMC_RES has to be written to the AC12 register (same as for default modes). Also have separate case sections for MMC_TIMING_UHS_SDR104 and MMC_TIMING_UHS_HS200 even though the same UHSMC value has to be written to the AC12 register. This is in preparation for setting iodelay values. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Sekhar Nori --- drivers/mmc/host/omap_hsmmc.c | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.11.0 diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 3676ffa72929..d797224152ac 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c @@ -1726,6 +1726,8 @@ static void omap_hsmmc_set_timing(struct omap_hsmmc_host *host) val &= ~AC12_UHSMC_MASK; switch (ios->timing) { case MMC_TIMING_UHS_SDR104: + val |= AC12_UHSMC_SDR104; + break; case MMC_TIMING_MMC_HS200: val |= AC12_UHSMC_SDR104; break; @@ -1741,6 +1743,13 @@ static void omap_hsmmc_set_timing(struct omap_hsmmc_host *host) case MMC_TIMING_UHS_SDR12: val |= AC12_UHSMC_SDR12; break; + case MMC_TIMING_SD_HS: + case MMC_TIMING_MMC_HS: + val |= AC12_UHSMC_RES; + break; + case MMC_TIMING_MMC_DDR52: + val |= AC12_UHSMC_RES; + break; default: val |= AC12_UHSMC_RES; break;