From patchwork Fri Jun 16 07:29:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 105696 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp1171616qgd; Fri, 16 Jun 2017 00:30:16 -0700 (PDT) X-Received: by 10.84.232.130 with SMTP id i2mr11149972plk.251.1497598216334; Fri, 16 Jun 2017 00:30:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497598216; cv=none; d=google.com; s=arc-20160816; b=mQTHyBU1wweaW0GlOSIuGY0wd21IwfY9PRwYexpVsT5cZjitqUyk6YM79NvsMyla9D 9gWf6r0R7fTkmW67j7oNNc8kSYCphd839Ntw6J1CjUUinFvq7TRLxTwJQ0+TU+0hbvns tJKEcVUIqCZ1usAo4J2Phy9tkviQgNKKHSwiXBi+Pzd2YT2VCsb32arsOXMMRhQBUleT nbFHvUr4Ay+8c4qmaeqvz9oyWKgSu/Kc4VZC7gyCYYePLNRsxfWnJrqE2+foLJT+fdRz Uv2xXy8lmgkJHDgeWr7aX/pLz7c+ivg328j/kZT+bzKw65PDceFG2CA0eHVdltq8xdDt fHCg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=YHjyOqooSiYkBf528ljtjHP+dD8Yzfz1wh4uzOTyuSg=; b=fOwWsDfeu80hGYaJvuv2fNxIMuWZQXbSjY2HiVjM1XI/xfCBQI0Aj94V3JUpwbkqM0 QyrK2bA1xIfuJzFBzTLE8Xcz4uUTGosNERB54CRDExQ6eHKZ7fB8n9F4hEWiCXfwjrZU QZ+bImnDWc+5ZBnaVdKFM15otXRscdY1JnLz7yqeRIW5HKevhLuNc6MKVnyI4oFNr9fP S3FZ88ryrN3TTrGqqnAmUzjQVEbsGRmJlTZvNzKdl/8u6jCtHQPEc3d77NngxpMXLFYC yBM642eXFLc93e4yjlHpKKd/K5OibKCS+I0gpOvPSMB9egbGhZhsU42EySDHE0RBLwPp dfcA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z77si1250966pfj.338.2017.06.16.00.30.16; Fri, 16 Jun 2017 00:30:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752649AbdFPH3r (ORCPT + 25 others); Fri, 16 Jun 2017 03:29:47 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:54093 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752418AbdFPH3o (ORCPT ); Fri, 16 Jun 2017 03:29:44 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id F39AE21DC6; Fri, 16 Jun 2017 09:29:42 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id B81A921DB7; Fri, 16 Jun 2017 09:29:42 +0200 (CEST) From: Quentin Schulz To: adrian.hunter@intel.com, ludovic.desroches@microchip.com, ulf.hansson@linaro.org Cc: Quentin Schulz , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, thomas.petazzoni@free-electrons.com, alexandre.belloni@free-electrons.com, nicolas.ferre@microchip.com Subject: [PATCH 2/2] mmc: sdhci-of-at91: set clocks and presets after resume from deepest PM Date: Fri, 16 Jun 2017 09:29:29 +0200 Message-Id: <20170616072929.3266-2-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170616072929.3266-1-quentin.schulz@free-electrons.com> References: <20170616072929.3266-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds deepest (Backup+Self-Refresh) PM support to the ATMEL SAMA5D2 SoC's SDHCI controller. When resuming from deepest state, it is required to restore preset registers as the registers are lost since VDD core has been shut down when entering deepest state on the SAMA5D2. The clocks need to be reconfigured as well. The other registers and init process are taken care of by the SDHCI core. Signed-off-by: Quentin Schulz --- drivers/mmc/host/sdhci-of-at91.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) -- 2.11.0 diff --git a/drivers/mmc/host/sdhci-of-at91.c b/drivers/mmc/host/sdhci-of-at91.c index fb8c6011f13d..300513fc1068 100644 --- a/drivers/mmc/host/sdhci-of-at91.c +++ b/drivers/mmc/host/sdhci-of-at91.c @@ -207,6 +207,37 @@ static int sdhci_at91_set_clks_presets(struct device *dev) } #ifdef CONFIG_PM +static int sdhci_at91_suspend(struct device *dev) +{ + struct sdhci_host *host = dev_get_drvdata(dev); + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host); + int ret; + + ret = sdhci_suspend_host(host); + + if (host->runtime_suspended) + return ret; + + clk_disable_unprepare(priv->gck); + clk_disable_unprepare(priv->hclock); + clk_disable_unprepare(priv->mainck); + + return ret; +} + +static int sdhci_at91_resume(struct device *dev) +{ + struct sdhci_host *host = dev_get_drvdata(dev); + int ret; + + ret = sdhci_at91_set_clks_presets(dev); + if (ret) + return ret; + + return sdhci_resume_host(host); +} + static int sdhci_at91_runtime_suspend(struct device *dev) { struct sdhci_host *host = dev_get_drvdata(dev); @@ -256,8 +287,7 @@ static int sdhci_at91_runtime_resume(struct device *dev) #endif /* CONFIG_PM */ static const struct dev_pm_ops sdhci_at91_dev_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, - pm_runtime_force_resume) + SET_SYSTEM_SLEEP_PM_OPS(sdhci_at91_suspend, sdhci_at91_resume) SET_RUNTIME_PM_OPS(sdhci_at91_runtime_suspend, sdhci_at91_runtime_resume, NULL)