From patchwork Thu Jun 15 03:04:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 105614 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp595406qgd; Wed, 14 Jun 2017 20:05:54 -0700 (PDT) X-Received: by 10.84.238.137 with SMTP id v9mr3750009plk.154.1497495954096; Wed, 14 Jun 2017 20:05:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1497495954; cv=none; d=google.com; s=arc-20160816; b=xltQjvJDpp2VZAVP38LZpQM2nG76RAypvwj1eTWwatEhAoIBZEtHPGyd29ZNoqrKjd hHLVYtwt2YbZJD7GijammC+cd35PAuryDBGUVa3Z5oAxOyv8pUyWBU3KIdYZUrfwnJKK nFft9SEp/WlRrpqJ0vcVW1fuEN7LdWgY0BNbn02anrXmTQgCTVl0Xu+dr8Vw8V2B3hGV OURjNRX2GaAPSDsEJFUni7cjt1mXel2sRMao9QAuzxwiYjWTxzPRwQLveWfiklRcpTPB mW5GoXD7Iysv4JSXokQzNUcaIFR7KxSWZ0rHF3Vh/3681Q2RmDpcC9BSDp3LlktAsEaf Ib8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=jXFtgFIjDk5tb4iZZTJ1ZCyrIT65KjYJF6ztgq0q2pk=; b=dTZdvI+mrcCVBBuBZ9VyAK4EQApJwT7AGb6QCdf1vS1tXod5lVnrWyF+4EsVP21yMH 8zsEQAhQTaiPcHr3lamIH74L8DOqpHJ+n6OwLFcOpO7JMH+o8FfvebbCU92d5EYUFAVx sbl9+QgILmHFTXdJPqHmrmgSkfdWI62opA6YoyiIm4zs2xZmDvGT/lnf24+RSF7cTYJi WuTfUh4SHyhsLRJiALxr3z/yeRqKWJ1EvEq2SLryntjrc99vh2cpz0CqV7/LmT8H4u6A lISBLTVAMizmZMVxhG+y50DhKyZsOyutH7GrELh0MXxZbvQvB4BLhOBjkNURHVBWOJUg JZ7g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.b=OBDlTtAh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e6si1293791plk.0.2017.06.14.20.05.53; Wed, 14 Jun 2017 20:05:54 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.b=OBDlTtAh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752583AbdFODFr (ORCPT + 25 others); Wed, 14 Jun 2017 23:05:47 -0400 Received: from mail-pf0-f180.google.com ([209.85.192.180]:34835 "EHLO mail-pf0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752105AbdFODFn (ORCPT ); Wed, 14 Jun 2017 23:05:43 -0400 Received: by mail-pf0-f180.google.com with SMTP id l89so1381740pfi.2 for ; Wed, 14 Jun 2017 20:05:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jXFtgFIjDk5tb4iZZTJ1ZCyrIT65KjYJF6ztgq0q2pk=; b=OBDlTtAhecZ0a5FXuychFJNRYaevdrILueB3jIq6WoHdgawa+OenYBD1FV0ynJjLUn Eavs2DAdjx9VqrPTNF4BjRaMAsF2DOAirT6eYv4YUcXs04Qfk58f/Thy2tzxgznEwMYN bptHauuxdpW/QfgXVxj5fR8Y5p23xLkgfZdVc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jXFtgFIjDk5tb4iZZTJ1ZCyrIT65KjYJF6ztgq0q2pk=; b=B2df7qlcMENggYgBy0q6rJA1QWD5q6XfyqinKxMvsnfnKH/pToWrgrZK1fzV1ioB5Y RVZL0h4/gZmyfXCuT9Anx9xMph8wGBTkTVtePWe/C42SUcx/c+frbUIlVPl2eXvbD7xt zUGuQNYDSL8yL2o9e6WUocDIKR8ef3TwoJBRcmIizfv42AOU9k9UFP1bsIaQK3Di7cYn k0CYtf/xHCtHSRgpx2+Z4sW6WOb41ZvQXSBb3XzSwYGUTAsLG52mGX6DfQq5lPUhWfE4 FfD+x02Eb7IAk+8jMwU/+aGTviEpz/8UFOBVk2rCOXvWWsS9UwS2KrurhugXykSc/UMb 3+Ew== X-Gm-Message-State: AKS2vOwlhWZO0D5kVFHJDcBk1T8rrtBxSFAQzsuyCT0Y1LgOVj1Lg0Ft ePiTIfs+Yv93YTqR X-Received: by 10.84.172.1 with SMTP id m1mr3640189plb.134.1497495942737; Wed, 14 Jun 2017 20:05:42 -0700 (PDT) Received: from localhost.localdomain ([45.56.159.17]) by smtp.gmail.com with ESMTPSA id y65sm2156656pgd.33.2017.06.14.20.05.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 20:05:42 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, horms+renesas@verge.net.au, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Zhangfei Gao , Jarkko Nikula , Guodong Xu Subject: [PATCH v4 05/20] arm64: dts: Add I2C nodes for Hi3660 Date: Thu, 15 Jun 2017 11:04:02 +0800 Message-Id: <20170615030417.14059-6-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170615030417.14059-1-guodong.xu@linaro.org> References: <20170615030417.14059-1-guodong.xu@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Zhangfei Gao Add I2C nodes for Hi3660-hikey960. On HiKey960, I2C0, I2C7 are connected to Low Speed Expansion Connector. I2C1 is connected to ADV7535. I2C3 is connected to USB5734. Cc: Jarkko Nikula Signed-off-by: Zhangfei Gao Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 22 +++++++++ arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 56 +++++++++++++++++++++++ 2 files changed, 78 insertions(+) -- 2.10.2 diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 64875a5..1a4d6c5 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -29,6 +29,28 @@ }; }; +&i2c0 { + /* On Low speed expansion */ + label = "LS-I2C0"; + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + adv7533: adv7533@39 { + status = "ok"; + compatible = "adi,adv7533"; + reg = <0x39>; + }; +}; + +&i2c7 { + /* On Low speed expansion */ + label = "LS-I2C1"; + status = "okay"; +}; + &uart5 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index f55710a..9abe84e 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -186,6 +186,62 @@ #reset-cells = <2>; }; + i2c0: i2c@ffd71000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xffd71000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C0>; + resets = <&iomcu_rst 0x20 3>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>; + status = "disabled"; + }; + + i2c1: i2c@ffd72000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xffd72000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C1>; + resets = <&iomcu_rst 0x20 4>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pmx_func &i2c1_cfg_func>; + status = "disabled"; + }; + + i2c3: i2c@fdf0c000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xfdf0c000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C3>; + resets = <&crg_rst 0x78 7>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pmx_func &i2c3_cfg_func>; + status = "disabled"; + }; + + i2c7: i2c@fdf0b000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0xfdf0b000 0x0 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + clocks = <&crg_ctrl HI3660_CLK_GATE_I2C7>; + resets = <&crg_rst 0x60 14>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7_pmx_func &i2c7_cfg_func>; + status = "disabled"; + }; + uart5: serial@fdf05000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf05000 0x0 0x1000>;