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[209.132.180.67]) by mx.google.com with ESMTP id s2si1341922pgr.230.2017.06.14.20.07.16; Wed, 14 Jun 2017 20:07:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.b=ZGdqPLyx; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752752AbdFODHH (ORCPT + 25 others); Wed, 14 Jun 2017 23:07:07 -0400 Received: from mail-pf0-f173.google.com ([209.85.192.173]:36471 "EHLO mail-pf0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752379AbdFODHE (ORCPT ); Wed, 14 Jun 2017 23:07:04 -0400 Received: by mail-pf0-f173.google.com with SMTP id x63so1368218pff.3 for ; Wed, 14 Jun 2017 20:07:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QmMsa438Vndpt0bSvJ6J+nTkIDX0vLnDog44Prz7oeo=; b=ZGdqPLyx+YEgX+C6zeqeRrFWO3KdcGlwMyY5APLzGBNK2ASohfmN5n+JsyG4fLuhlh Qfu6bzi2WEv9OB4tBDW/2FG0sCvvBd+sr/CEDHdbU9UDxktE2cXGsISMIp8mD8bF6Xfw LZXDsj3r/J0eZnqyBv8n/1h3697jYoXfq/TKI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QmMsa438Vndpt0bSvJ6J+nTkIDX0vLnDog44Prz7oeo=; b=SXsICPSRMtUiZG2rQP1u1G8ofCKVDQN3jQLleYZTP75bG4ViPw1Vla/ONRG3gktxiE 8GyDqRLSFDkfHSS3Y+ZVo+osqasgAWiHZZiM5jQEh0RUmAWvlGF44hCyq8NY7WHTDkCL ukbcHzrFZbpVUuocK49yxTc5C2uWeM2t5G6uqKKbkZkZzjtaLQbv5HH62d8dYrIBe13i ebUYMalu3KTh7LbWS2p40bGMA4F1w61+tyrl59sTBjUNOi+dPr+V8ikwp3xucXnJvpcR ux9g5nOFc+ItHKu+gQyDftrCuK5Wk7jv/ijnZosQ2TMbUMSAbW3S2lwKXx/fuseuZ14y dgAw== X-Gm-Message-State: AKS2vOyip27dcP7uRKl8L+4qDmSD54wekAKkhgXxRlNPLIFanO9vMXTk h8x283fHUXhwMl1A X-Received: by 10.98.35.18 with SMTP id j18mr2977721pfj.161.1497496023965; Wed, 14 Jun 2017 20:07:03 -0700 (PDT) Received: from localhost.localdomain ([45.56.159.17]) by smtp.gmail.com with ESMTPSA id y65sm2156656pgd.33.2017.06.14.20.06.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 20:07:03 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, horms+renesas@verge.net.au, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Xiaowei Song , Guodong Xu Subject: [PATCH v4 15/20] arm64: dts: hisi: add kirin pcie node Date: Thu, 15 Jun 2017 11:04:12 +0800 Message-Id: <20170615030417.14059-16-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170615030417.14059-1-guodong.xu@linaro.org> References: <20170615030417.14059-1-guodong.xu@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Xiaowei Song Add PCIe node for hi3660, and add binding documentation. Cc: Guodong Xu Signed-off-by: Xiaowei Song Acked-by: Arnd Bergmann --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 32 +++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) -- 2.10.2 diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index e138973..529cf08 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -754,5 +754,37 @@ cs-gpios = <&gpio18 5 0>; status = "disabled"; }; + + pcie@f4000000 { + compatible = "hisilicon,kirin960-pcie"; + reg = <0x0 0xf4000000 0x0 0x1000>, + <0x0 0xff3fe000 0x0 0x1000>, + <0x0 0xf3f20000 0x0 0x40000>, + <0x0 0xf5000000 0x0 0x2000>; + reg-names = "dbi", "apb", "phy", "config"; + bus-range = <0x0 0x1>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x02000000 0x0 0x00000000 0x0 + 0xf6000000 0x0 0x2000000>; + num-lanes = <1>; + #interrupt-cells = <1>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0x0 0 0 1 &gic 0 0 0 282 4>, + <0x0 0 0 2 &gic 0 0 0 283 4>, + <0x0 0 0 3 &gic 0 0 0 284 4>, + <0x0 0 0 4 &gic 0 0 0 285 4>; + clocks = <&crg_ctrl HI3660_PCIEPHY_REF>, + <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>, + <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>, + <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>, + <&crg_ctrl HI3660_ACLK_GATE_PCIE>; + clock-names = "pcie_phy_ref", "pcie_aux", + "pcie_apb_phy", "pcie_apb_sys", + "pcie_aclk"; + reset-gpios = <&gpio11 1 0 >; + status = "ok"; + }; }; };