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a=rsa-sha256; c=relaxed/relaxed; d=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=XELQI0+xp2bh9jHZuGu5/+BuLc/kBgK3u2BtG+LkSMM=; b=dBN2yKha7LBOVy8vFPXafvuHps56Xa8g88nIWGf1vd2APsIVyeEzuefsm4Wv6Dk4HYsqUI5HCEV2CbWnlbnGOSU1UpOilV9UICwzEbTR7piKat+zRmmiBiztWh6bHd1VdR76qDIonwhA2LbDuwFy0CAZg+fgDF49RNCMsEP/NII= Authentication-Results: arm.com; dkim=none (message not signed) header.d=none; arm.com; dmarc=none action=none header.from=caviumnetworks.com; Received: from localhost (176.59.55.28) by DM2PR0701MB1280.namprd07.prod.outlook.com (2a01:111:e400:5118::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1143.10; Sun, 4 Jun 2017 12:02:15 +0000 From: Yury Norov To: Catalin Marinas , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Arnd Bergmann Cc: Yury Norov , Andrew Pinski , Andrew Pinski , Adam Borowski , Chris Metcalf , Steve Ellcey , Maxim Kuvyrkov , Ramana Radhakrishnan , Florian Weimer , Bamvor Zhangjian , Andreas Schwab , Chris Metcalf , Heiko Carstens , schwidefsky@de.ibm.com, broonie@kernel.org, Joseph Myers , christoph.muellner@theobroma-systems.com, szabolcs.nagy@arm.com, klimov.linux@gmail.com, Nathan_Lynch@mentor.com, agraf@suse.de, Prasun.Kapoor@caviumnetworks.com, geert@linux-m68k.org, philipp.tomsich@theobroma-systems.com, manuel.montezelo@gmail.com, linyongting@huawei.com, davem@davemloft.net, zhouchengming1@huawei.com Subject: [PATCH 10/20] arm64: ilp32: add is_ilp32_compat_{task, thread} and TIF_32BIT_AARCH64 Date: Sun, 4 Jun 2017 14:59:59 +0300 Message-Id: <20170604120009.342-11-ynorov@caviumnetworks.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170604120009.342-1-ynorov@caviumnetworks.com> References: <20170604120009.342-1-ynorov@caviumnetworks.com> MIME-Version: 1.0 X-Originating-IP: [176.59.55.28] X-ClientProxiedBy: HE1PR09CA0078.eurprd09.prod.outlook.com (2603:10a6:7:3d::22) To DM2PR0701MB1280.namprd07.prod.outlook.com (2a01:111:e400:5118::18) X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM2PR0701MB1280: X-MS-Office365-Filtering-Correlation-Id: 2fccd041-0a5d-432b-0c6b-08d4ab418b1e X-Microsoft-Antispam: UriScan:; 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24:5OWENzzA8b8X95NMoopy9te/80BAo01GQN0Q2N9Dng0tHx4piKsX4aBqBOaMfMs9zImlnCmukTY7wlyGb7JePyT9n6mU6Fes6vJUspQ9Njo= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; DM2PR0701MB1280; 7:dtbGzCxmtkNm8+7MDHZEReCA25ShHNiwPL/couMpZXsuF03wlkatZyG35Kc4470Ax1oEr0p2XEjONQABDxyFoj89Qn6reIuQhOboA2vwYxUZVwz3DDCEFN6HXpgcee5+SAVvOap4Vl4xrNQUOkQpWx+ldcMgIqY3SUZcSCNI3xeXqh4rIawOR+KBf+KNmjuGqVxtBn1cMEF8Ys96iRwyIaw3Sv+ds4ZIEj9HrVnT/4zNvJcw05LK6N/y+6DHdx1XAyTwT1codLsuUtg/Et3hptDruTc40Hagm9hngfTm2A/Ahjn+8a7lStpCNejBfLsNERDvHg4NwTUQFAIadVgXDg== X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jun 2017 12:02:15.5996 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM2PR0701MB1280 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ILP32 tasks are needed to be distinguished from lp64 and aarch32. This patch adds helper functions is_ilp32_compat_{task,thread} and thread flag TIF_32BIT_AARCH64 to address it. This is a preparation for following patches in ilp32 patchset. For consistency, SET_PERSONALITY is changed here accordingly. Signed-off-by: Andrew Pinski Signed-off-by: Philipp Tomsich Signed-off-by: Christoph Muellner Signed-off-by: Yury Norov Reviewed-by: David Daney --- arch/arm64/include/asm/elf.h | 2 ++ arch/arm64/include/asm/is_compat.h | 30 ++++++++++++++++++++++++++++-- arch/arm64/include/asm/thread_info.h | 2 ++ 3 files changed, 32 insertions(+), 2 deletions(-) -- 2.11.0 diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index 6a37b6facc69..8f7bafa60d01 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h @@ -145,6 +145,7 @@ typedef struct user_fpsimd_state elf_fpregset_t; #define SET_PERSONALITY(ex) \ ({ \ clear_bit(TIF_32BIT, ¤t->mm->context.flags); \ + clear_thread_flag(TIF_32BIT_AARCH64); \ clear_thread_flag(TIF_32BIT); \ current->personality &= ~READ_IMPLIES_EXEC; \ }) @@ -196,6 +197,7 @@ typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; #define COMPAT_SET_PERSONALITY(ex) \ ({ \ set_bit(TIF_32BIT, ¤t->mm->context.flags); \ + clear_thread_flag(TIF_32BIT_AARCH64); \ set_thread_flag(TIF_32BIT); \ }) #define COMPAT_ARCH_DLINFO diff --git a/arch/arm64/include/asm/is_compat.h b/arch/arm64/include/asm/is_compat.h index 8dba5caaf5d1..7726bebc4115 100644 --- a/arch/arm64/include/asm/is_compat.h +++ b/arch/arm64/include/asm/is_compat.h @@ -45,18 +45,44 @@ static inline int is_a32_compat_thread(struct thread_info *thread) #endif /* CONFIG_AARCH32_EL0 */ +#ifdef CONFIG_ARM64_ILP32 + +static inline int is_ilp32_compat_task(void) +{ + return test_thread_flag(TIF_32BIT_AARCH64); +} + +static inline int is_ilp32_compat_thread(struct thread_info *thread) +{ + return test_ti_thread_flag(thread, TIF_32BIT_AARCH64); +} + +#else + +static inline int is_ilp32_compat_task(void) +{ + return 0; +} + +static inline int is_ilp32_compat_thread(struct thread_info *thread) +{ + return 0; +} + +#endif /* CONFIG_ARM64_ILP32 */ + #ifdef CONFIG_COMPAT static inline int is_compat_task(void) { - return is_a32_compat_task(); + return is_a32_compat_task() || is_ilp32_compat_task(); } #endif /* CONFIG_COMPAT */ static inline int is_compat_thread(struct thread_info *thread) { - return is_a32_compat_thread(thread); + return is_a32_compat_thread(thread) || is_ilp32_compat_thread(thread); } diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index a7ffea24d94d..abb60b5fc9f4 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -96,6 +96,7 @@ struct thread_info { #define TIF_RESTORE_SIGMASK 20 #define TIF_SINGLESTEP 21 #define TIF_32BIT 22 /* AARCH32 process */ +#define TIF_32BIT_AARCH64 23 /* 32 bit process on AArch64(ILP32) */ #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) @@ -108,6 +109,7 @@ struct thread_info { #define _TIF_SECCOMP (1 << TIF_SECCOMP) #define _TIF_UPROBE (1 << TIF_UPROBE) #define _TIF_32BIT (1 << TIF_32BIT) +#define _TIF_32BIT_AARCH64 (1 << TIF_32BIT_AARCH64) #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ _TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE | \