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[209.132.180.67]) by mx.google.com with ESMTP id b78si7616830pfe.220.2017.05.19.01.18.44; Fri, 19 May 2017 01:18:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755037AbdESISk (ORCPT + 25 others); Fri, 19 May 2017 04:18:40 -0400 Received: from fllnx210.ext.ti.com ([198.47.19.17]:50318 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752860AbdESISe (ORCPT ); Fri, 19 May 2017 04:18:34 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v4J8HvAf024575; Fri, 19 May 2017 03:17:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1495181877; bh=RWo9O49SJSs1+9hJktXcCEWPkgm6objj/QL/mB7g3sk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Yz46/2BbZZkc8wOCRvDR3dVqtexeAmKopaQNUgMj1KhZhRSlBBSI695wOMPVeIkML Rc1aTkNNWjxuikkYn2x+VuVgBOnN/27TlPD4UDKuq9K0rwRTUz2rNjf2fzvSaE9VoI nZGgWqT/HP3SM0bzaZnU3MW1S1NHxze9FS0WlXAM= Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4J8HvOe028979; Fri, 19 May 2017 03:17:57 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.294.0; Fri, 19 May 2017 03:17:56 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v4J8FfQa009185; Fri, 19 May 2017 03:17:52 -0500 From: Kishon Vijay Abraham I To: Ulf Hansson , Rob Herring , Tony Lindgren CC: , , , , , , Jonathan Corbet , Mark Rutland , Russell King , , Subject: [PATCH 29/41] ARM: dts: am572x-idk: Add pinmux configuration for MMC Date: Fri, 19 May 2017 13:45:29 +0530 Message-ID: <20170519081541.26753-30-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170519081541.26753-1-kishon@ti.com> References: <20170519081541.26753-1-kishon@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Include dra74x-mmc-iodelay.dtsi which has pinmux and IODelay configuration values for the various MMC modes for dra74x SoC and use it in the pinctrl properties of MMC devicetree nodes present in am572x-idk.dts. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/am572x-idk.dts | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.11.0 diff --git a/arch/arm/boot/dts/am572x-idk.dts b/arch/arm/boot/dts/am572x-idk.dts index 1c112eb25db4..79fac687428c 100644 --- a/arch/arm/boot/dts/am572x-idk.dts +++ b/arch/arm/boot/dts/am572x-idk.dts @@ -12,6 +12,7 @@ #include #include #include "am57xx-idk-common.dtsi" +#include "dra74x-mmc-iodelay.dtsi" / { model = "TI AM5728 IDK"; @@ -67,6 +68,24 @@ }; }; +&mmc1 { + pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_hs>; + pinctrl-2 = <&mmc1_pins_sdr12>; + pinctrl-3 = <&mmc1_pins_sdr25>; + pinctrl-4 = <&mmc1_pins_sdr50>; + pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>; + pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; +}; + +&mmc2 { + pinctrl-names = "default", "hs", "ddr_1_8v"; + pinctrl-0 = <&mmc2_pins_default>; + pinctrl-1 = <&mmc2_pins_hs>; + pinctrl-2 = <&mmc2_pins_ddr_rev20>; +}; + &omap_dwc3_2 { extcon = <&extcon_usb2>; };