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[84.219.148.60]) by smtp.gmail.com with ESMTPSA id 139sm409680ljj.16.2017.05.17.07.07.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 17 May 2017 07:07:01 -0700 (PDT) From: Linus Walleij To: Daniel Lezcano , Thomas Gleixner , Joel Stanley , Jonas Jensen Cc: Janos Laube , Paulius Zaleckas , linux-arm-kernel@lists.infradead.org, Hans Ulli Kroll , Florian Fainelli , linux-kernel@vger.kernel.org, Linus Walleij Subject: [PATCH 8/8] ARM: dts: augment Moxa and Aspeed DTS for FTTMR010 Date: Wed, 17 May 2017 16:05:42 +0200 Message-Id: <20170517140542.20016-9-linus.walleij@linaro.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170517140542.20016-1-linus.walleij@linaro.org> References: <20170517140542.20016-1-linus.walleij@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This augments the Moxa Art and Aspeed device trees to: - Explicitly name the clock "PCLK" as the Faraday FTTMR010 names it. - List the Moxa timer as compatible with the Faradat FTTMR010 vanilla version. - Add a comment that the Aspeed driver is a Faraday FTTMR010 derivative. - Pass all IRQs to the timer from Aspeed: they are all there so they should be in the device tree, we only use the first one anyways. Cc: Joel Stanley Cc: Jonas Jensen Signed-off-by: Linus Walleij --- Clocksource maintainers: I will ask the ARM SoC people to merge this patch orthogonally, it is only included in this series for reference and for testing. --- arch/arm/boot/dts/aspeed-g4.dtsi | 7 +++---- arch/arm/boot/dts/aspeed-g5.dtsi | 6 +++--- arch/arm/boot/dts/moxart.dtsi | 3 ++- 3 files changed, 8 insertions(+), 8 deletions(-) -- 2.9.3 diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi index 8c6bc29eb7f6..8a04c7e2d818 100644 --- a/arch/arm/boot/dts/aspeed-g4.dtsi +++ b/arch/arm/boot/dts/aspeed-g4.dtsi @@ -886,13 +886,12 @@ }; timer: timer@1e782000 { + /* This timer is a Faraday FTTMR010 derivative */ compatible = "aspeed,ast2400-timer"; reg = <0x1e782000 0x90>; - // The moxart_timer driver registers only one - // interrupt and assumes it's for timer 1 - //interrupts = <16 17 18 35 36 37 38 39>; - interrupts = <16>; + interrupts = <16 17 18 35 36 37 38 39>; clocks = <&clk_apb>; + clock-names = "PCLK"; }; wdt1: wdt@1e785000 { diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index a0bea4a6ec77..2b613fb61804 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -993,13 +993,13 @@ }; timer: timer@1e782000 { + /* This timer is a Faraday FTTMR010 derivative */ compatible = "aspeed,ast2400-timer"; reg = <0x1e782000 0x90>; - // The moxart_timer driver registers only one - // interrupt and assumes it's for timer 1 - //interrupts = <16 17 18 35 36 37 38 39>; + interrupts = <16 17 18 35 36 37 38 39>; interrupts = <16>; clocks = <&clk_apb>; + clock-names = "PCLK"; }; diff --git a/arch/arm/boot/dts/moxart.dtsi b/arch/arm/boot/dts/moxart.dtsi index e86f8c905ac5..1f4c795d3f72 100644 --- a/arch/arm/boot/dts/moxart.dtsi +++ b/arch/arm/boot/dts/moxart.dtsi @@ -58,10 +58,11 @@ }; timer: timer@98400000 { - compatible = "moxa,moxart-timer"; + compatible = "moxa,moxart-timer", "faraday,fttmr010"; reg = <0x98400000 0x42>; interrupts = <19 IRQ_TYPE_EDGE_FALLING>; clocks = <&clk_apb>; + clock-names = "PCLK"; }; gpio: gpio@98700000 {