From patchwork Fri Apr 14 08:22:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 97427 Delivered-To: patch@linaro.org Received: by 10.140.109.52 with SMTP id k49csp194833qgf; Fri, 14 Apr 2017 01:23:29 -0700 (PDT) X-Received: by 10.99.152.9 with SMTP id q9mr5647877pgd.225.1492158209776; Fri, 14 Apr 2017 01:23:29 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f69si1180631pfc.184.2017.04.14.01.23.29; Fri, 14 Apr 2017 01:23:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752874AbdDNIXB (ORCPT + 14 others); Fri, 14 Apr 2017 04:23:01 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:41177 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752703AbdDNIW5 (ORCPT ); Fri, 14 Apr 2017 04:22:57 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id B8452207E1; Fri, 14 Apr 2017 10:22:55 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from qschulz.lan (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 8040B20759; Fri, 14 Apr 2017 10:22:45 +0200 (CEST) From: Quentin Schulz To: nicolas.ferre@microchip.com, broonie@kernel.org Cc: Quentin Schulz , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, alexandre.belloni@free-electrons.com, thomas.petazzoni@free-electrons.com Subject: [PATCH 2/2] spi: atmel: add deepest PM support to SAMA5D2 Date: Fri, 14 Apr 2017 10:22:43 +0200 Message-Id: <20170414082243.23002-2-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170414082243.23002-1-quentin.schulz@free-electrons.com> References: <20170414082243.23002-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This adds deepest (Backup+Self-Refresh) PM support to the ATMEL SAMA5D2 SoC's SPI controller. When resuming from deepest state, it is required to restore MR register as the registers are lost since VDD core has been shut down when entering deepest state on the SAMA5D2. Signed-off-by: Quentin Schulz --- v2: - fix commit log explanation on why restoring the registers is required after resuming from deepest state, drivers/spi/spi-atmel.c | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.9.3 diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 247d920..1eb83c9 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1702,8 +1702,17 @@ static int atmel_spi_suspend(struct device *dev) static int atmel_spi_resume(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); + struct atmel_spi *as = spi_master_get_devdata(master); int ret; + ret = clk_prepare_enable(as->clk); + if (ret) + return ret; + + atmel_spi_init(as); + + clk_disable_unprepare(as->clk); + if (!pm_runtime_suspended(dev)) { ret = atmel_spi_runtime_resume(dev); if (ret)