From patchwork Mon Apr 10 13:18:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 97148 Delivered-To: patch@linaro.org Received: by 10.182.246.10 with SMTP id xs10csp1353290obc; Mon, 10 Apr 2017 06:22:01 -0700 (PDT) X-Received: by 10.98.61.91 with SMTP id k88mr16271936pfa.62.1491830521167; Mon, 10 Apr 2017 06:22:01 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c66si13612019pfj.230.2017.04.10.06.22.00; Mon, 10 Apr 2017 06:22:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754098AbdDJNVg (ORCPT + 24 others); Mon, 10 Apr 2017 09:21:36 -0400 Received: from fllnx210.ext.ti.com ([198.47.19.17]:11375 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753582AbdDJNTW (ORCPT ); Mon, 10 Apr 2017 09:19:22 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id v3ADJ1M6025979; Mon, 10 Apr 2017 08:19:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1491830341; bh=HnGA0kVCfLDOiwS/5MCQWXqRNdxjx4BUWKNf1The1GY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pc9u9SGibLE1wN70KkMFt7YBbGCqDJkUFYYFfWbsISypOHWbPO4FVzCio+LLY6ReZ bqJjZpxXM65m/FrY7Utj9GoMxGyIVvtjM7ohNyCVfDGXAQuL/pSxlU6p14lMVAmqOt CXw4S/f+ebkZM+bxBx+Lpjv3Cl3bjrP/9WtPXefw= Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v3ADJ1gg020566; Mon, 10 Apr 2017 08:19:01 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.294.0; Mon, 10 Apr 2017 08:19:00 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v3ADIOMH032573; Mon, 10 Apr 2017 08:18:59 -0500 From: Kishon Vijay Abraham I To: CC: , Subject: [PATCH 23/32] dt-bindings: phy-rockchip-inno-usb2: add assign clock property in usb2-phy node Date: Mon, 10 Apr 2017 18:48:14 +0530 Message-ID: <20170410131823.26485-24-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170410131823.26485-1-kishon@ti.com> References: <20170410131823.26485-1-kishon@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Meng Dongyang On some platform such as RK3328, the 480m clock may need to assign clock parent in dts in stead of clock driver. So this patch add property of assigned-clocks and assigned-clock-parents to assign parent for 480m clock. Signed-off-by: Meng Dongyang Acked-by: Rob Herring Reviewed-by: Heiko Stuebner Signed-off-by: Kishon Vijay Abraham I --- Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.11.0 diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt index 3c29c77a7018..e71a8d23f4a8 100644 --- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt @@ -2,6 +2,7 @@ ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK Required properties (phy (parent) node): - compatible : should be one of the listed compatibles: + * "rockchip,rk3328-usb2phy" * "rockchip,rk3366-usb2phy" * "rockchip,rk3399-usb2phy" - reg : the address offset of grf for usb-phy configuration. @@ -11,6 +12,11 @@ Required properties (phy (parent) node): Optional properties: - clocks : phandle + phy specifier pair, for the input clock of phy. - clock-names : input clock name of phy, must be "phyclk". + - assigned-clocks : phandle of usb 480m clock. + - assigned-clock-parents : parent of usb 480m clock, select between + usb-phy output 480m and xin24m. + Refer to clk/clock-bindings.txt for generic clock + consumer properties. Required nodes : a sub-node is required for each port the phy provides. The sub-node name is used to identify host or otg port,