From patchwork Mon Mar 20 08:16:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 95478 Delivered-To: patch@linaro.org Received: by 10.140.89.233 with SMTP id v96csp834630qgd; Mon, 20 Mar 2017 01:35:50 -0700 (PDT) X-Received: by 10.98.16.11 with SMTP id y11mr31098144pfi.84.1489998950474; Mon, 20 Mar 2017 01:35:50 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e84si11838789pfb.265.2017.03.20.01.35.50; Mon, 20 Mar 2017 01:35:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753300AbdCTIeE (ORCPT + 23 others); Mon, 20 Mar 2017 04:34:04 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:38673 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753084AbdCTIRu (ORCPT ); Mon, 20 Mar 2017 04:17:50 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id C191B207E4; Mon, 20 Mar 2017 09:17:24 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from qschulz.home (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 865ED207EA; Mon, 20 Mar 2017 09:17:07 +0100 (CET) From: Quentin Schulz To: sre@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, wens@csie.org, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, lee.jones@linaro.org, icenowy@aosc.xyz Cc: Quentin Schulz , liam@networkimprov.net, thomas.petazzoni@free-electrons.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-iio@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [RESEND PATCH v4 9/9] mfd: axp20x: add CHRG_CTRL1/2/3 to writeable regs for AXP20X/AXP22X Date: Mon, 20 Mar 2017 09:16:53 +0100 Message-Id: <20170320081653.8884-10-quentin.schulz@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170320081653.8884-1-quentin.schulz@free-electrons.com> References: <20170320081653.8884-1-quentin.schulz@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The CHRG_CTRL1 and CHRG_CTRL2 registers are made for controlling different battery charging settings such as the constant current charge value. The AXP22X also have a third register CHRG_CTRL3 which has settings for battery charging too. This adds the CHRG_CTRL1, CHRG_CTRL2 and CHRG_CTRL3 registers to the list of writeable registers for AXP20X and AXP22X PMICs. Signed-off-by: Quentin Schulz Acked-by: Maxime Ripard Acked-by: Chen-Yu Tsai Acked-for-MFD-by: Lee Jones --- v2: - added AXP20X_CHRG_CTRL2 and AXP20X_CHRG_CTRL3 to the writeable registers table, - removed added reg range for ADC data in volatile regs range, drivers/mfd/axp20x.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.9.3 diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 37643b1..5ba3b04 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -68,6 +68,7 @@ static const struct regmap_access_table axp152_volatile_table = { static const struct regmap_range axp20x_writeable_ranges[] = { regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), + regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2), regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES), regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)), }; @@ -94,6 +95,7 @@ static const struct regmap_access_table axp20x_volatile_table = { /* AXP22x ranges are shared with the AXP809, as they cover the same range */ static const struct regmap_range axp22x_writeable_ranges[] = { regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE), + regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3), regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1), };