From patchwork Tue Sep 20 06:30:03 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 76587 Delivered-To: patch@linaro.org Received: by 10.140.106.72 with SMTP id d66csp1322897qgf; Mon, 19 Sep 2016 23:30:59 -0700 (PDT) X-Received: by 10.98.102.81 with SMTP id a78mr27136568pfc.28.1474353059623; Mon, 19 Sep 2016 23:30:59 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l7si1839192paz.77.2016.09.19.23.30.59; Mon, 19 Sep 2016 23:30:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932679AbcITGar (ORCPT + 27 others); Tue, 20 Sep 2016 02:30:47 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:33845 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932537AbcITGao (ORCPT ); Tue, 20 Sep 2016 02:30:44 -0400 Received: by mail-pf0-f195.google.com with SMTP id 21so481209pfy.1; Mon, 19 Sep 2016 23:30:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=+FDcSegfUctawCUPyp1c0fp+9N5IvKh0whbN9nXgIT8=; b=NgX3m4d2s4BYHlHYvT4TPjIs6Syi2XO1gujux5jytkWLLtM4e25+jKO+a960rFTVs5 YZ1JcJB+LCuBSSSw1Zy5PwgTHL8DYsnGYJ5V+qKrkYOjPBfGIM5+Zbs1VCrtKzEtKflq VdW8P+9ForzQpYciSuQV/GrDpA80c5o0Pq0oL5SORtyadt1wQEAxtJ7LiesEVOsCjtLq t1c4PrjqDwNyOSPMw5ZA5UdXGz/flOovLGZJp3x8fsSYr7pNhEbXowjHe1x4hceHDQv5 qnHVPWwWaN1LPGg6fM8CviTQ5H8VCSirSp84AXr5N7WLCGDB465D/1WtYKOGW9TG2a61 r04A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=+FDcSegfUctawCUPyp1c0fp+9N5IvKh0whbN9nXgIT8=; b=cxsiunzE2bKOYHTqzhxfaj9L0R+llZ2dtoJkvxJS/ty8lgoL7lKgDdKdGcNISdI0sW L5QhtNFRAANbWV+HHWq+RwWeqBV5EoN78SdS8/Sj+1ZrGh78G9UKjDd8Qs9xEsiKIDu2 fuqT+K8IjizCc35zjFU/FuKZTHEdABJNhzNeGPtUWAUMDVMtU+RV2Fnc4yRBRbxYqweG mRUn3vnOii4Ew/cq2lMJlTFPp/Ga9FuKr79gQJh2VmoJk247/SkLw59HZydEl8YOCzWt PYWNPdG0Zs3MB4pjCJUjTAIhAMncsycNpbHDJI8l324auCUtTHcO2wm/btOaYXEKyzRF VB4A== X-Gm-Message-State: AE9vXwPjGx8BkNH0zRgwzW622s+byaTp3Nn2SQVN+Rp/yJ2Us9djii+xjjBtiOepLPq8fA== X-Received: by 10.98.192.130 with SMTP id g2mr52873094pfk.54.1474353043628; Mon, 19 Sep 2016 23:30:43 -0700 (PDT) Received: from aurora.jms.id.au ([203.0.153.9]) by smtp.gmail.com with ESMTPSA id i68sm75902505pfc.25.2016.09.19.23.30.39 (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 19 Sep 2016 23:30:42 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Tue, 20 Sep 2016 16:00:36 +0930 From: Joel Stanley To: davem@davemloft.net Cc: gwshan@linux.vnet.ibm.com, andrew@lunn.ch, andrew@aj.id.au, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, benh@kernel.crashing.org Subject: [PATCH net-next 3/7] net/faraday: Adapt for Aspeed SoCs Date: Tue, 20 Sep 2016 16:00:03 +0930 Message-Id: <20160920063007.24291-4-joel@jms.id.au> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20160920063007.24291-1-joel@jms.id.au> References: <20160920063007.24291-1-joel@jms.id.au> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The RXDES and TXDES registers bits in the ftgmac100 indicates EDO{R,T}R at bit position 15 for the Faraday Tech IP. However, the version of this IP present in the Aspeed SoCs has these bits at position 30 in the registers. It appers that ast2400 SoCs support both positions, with the 15th bit marked as reserved but still functional. In the ast2500 this bit is reused for another function, so we need a work around. This was confirmed with engineers from Aspeed that using bit 30 is correct for both the ast2400 and ast2500 SoCs. Signed-off-by: Joel Stanley --- drivers/net/ethernet/faraday/ftgmac100.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) -- 2.9.3 diff --git a/drivers/net/ethernet/faraday/ftgmac100.c b/drivers/net/ethernet/faraday/ftgmac100.c index 62a88d1a1f99..47f512224b57 100644 --- a/drivers/net/ethernet/faraday/ftgmac100.c +++ b/drivers/net/ethernet/faraday/ftgmac100.c @@ -1345,9 +1345,6 @@ static int ftgmac100_probe(struct platform_device *pdev) priv->netdev = netdev; priv->dev = &pdev->dev; - priv->rxdes0_edorr_mask = BIT(15); - priv->txdes0_edotr_mask = BIT(15); - spin_lock_init(&priv->tx_lock); /* initialize NAPI */ @@ -1381,6 +1378,16 @@ static int ftgmac100_probe(struct platform_device *pdev) FTGMAC100_INT_PHYSTS_CHG | FTGMAC100_INT_RPKT_BUF | FTGMAC100_INT_NO_RXBUF); + + if (of_machine_is_compatible("aspeed,ast2400") || + of_machine_is_compatible("aspeed,ast2500")) { + priv->rxdes0_edorr_mask = BIT(30); + priv->txdes0_edotr_mask = BIT(30); + } else { + priv->rxdes0_edorr_mask = BIT(15); + priv->txdes0_edotr_mask = BIT(15); + } + if (pdev->dev.of_node && of_get_property(pdev->dev.of_node, "use-ncsi", NULL)) { if (!IS_ENABLED(CONFIG_NET_NCSI)) {