From patchwork Mon Jun 20 03:50:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xinliang Liu X-Patchwork-Id: 70399 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp1321005qgy; Sun, 19 Jun 2016 20:51:48 -0700 (PDT) X-Received: by 10.98.107.129 with SMTP id g123mr19233751pfc.62.1466394708586; Sun, 19 Jun 2016 20:51:48 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c133si30517130pfc.145.2016.06.19.20.51.48; Sun, 19 Jun 2016 20:51:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752622AbcFTDuw (ORCPT + 30 others); Sun, 19 Jun 2016 23:50:52 -0400 Received: from mail-pa0-f44.google.com ([209.85.220.44]:33784 "EHLO mail-pa0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751974AbcFTDuf (ORCPT ); Sun, 19 Jun 2016 23:50:35 -0400 Received: by mail-pa0-f44.google.com with SMTP id b13so46434921pat.0 for ; Sun, 19 Jun 2016 20:50:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=b5+EuBQyMBH/S2oVI0wlGWMYPqydVeXaJQLXsYLa/OI=; b=UkSvH/QB+Ce802tB0z3gMjHKF7Hr3KgXyfbAvu03leukI838aSWDoYbxVeZ0GeAkks T5lZiko/ViHuSi91bAtRqom1Nre0mXO2gNJkaajFCe00sQRvhkn1Fse+JFKkdje1ozly detBSs3MJLt9xWYN8ezMgbgLqCdXoxT5DTvO0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=b5+EuBQyMBH/S2oVI0wlGWMYPqydVeXaJQLXsYLa/OI=; b=GfgsXzCcvwP3pNob64+aZ5dFAXAHrJm8Qv7IurXGhdZA03E2vA9YJVNyECAH5j4pqi 4/pZuA2DktjIpCQ41C2MQ+tyOLrrmfx1w6k8WbLKcyjAx9XhBWRYh2DKSWdTrSCi7SO+ /OseYVWV09Ja5z9+KznCzQPHMbnG8PLbDAZRPEiAgpEx6aMuAPMOaR1faa4C+leZ+3X5 I0jUdZx5+STXIxAop64wQYPllWF1fImmce1BsKltcMPhht0+4fUYGwTrAdApPojmASAC TQ2W5GMlPSBmFAOyvggZQFdgKL2pC8y0R0toSw3VtzM5yw9Z08sVkdOqbF7Crx0MBfUw JlgA== X-Gm-Message-State: ALyK8tK6HS2RY/7WvSmLPmCM7pgXAY9cU8ncnsgEO30SdJgrRubYqBn7ulpcgHA6t/Ynbo0v X-Received: by 10.66.134.172 with SMTP id pl12mr19508244pab.66.1466394634730; Sun, 19 Jun 2016 20:50:34 -0700 (PDT) Received: from HTSAT-OPENLAB-SERVER.localdomain ([14.154.190.136]) by smtp.gmail.com with ESMTPSA id i187sm50990403pfc.62.2016.06.19.20.50.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 19 Jun 2016 20:50:34 -0700 (PDT) From: Xinliang Liu To: p.zabel@pengutronix.de Cc: linux-kernel@vger.kernel.org, robh+dt@kernel.org, xuwei5@hisilicon.com, puck.chen@hisilicon.com, saberlily.xia@hisilicon.com, kong.kongxinwei@hisilicon.com, guodong.xu@linaro.org, Xinliang Liu Subject: [PATCH v3 1/4] reset: hisilicon: Add media reset controller binding Date: Mon, 20 Jun 2016 11:50:04 +0800 Message-Id: <20160620035007.229629-2-xinliang.liu@linaro.org> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20160620035007.229629-1-xinliang.liu@linaro.org> References: <20160620035007.229629-1-xinliang.liu@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add compatible for media reset controller. Actually, there are two reset controllers in hi6220 SoC: The peripheral reset controller bits are part of sysctrl registers. The media reset controller bits are part of mediactrl registers. So for the compatible part, it should contain "syscon" for both peripheral and media reset controller. Signed-off-by: Xinliang Liu --- Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) -- 2.8.3 diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt index e0b185a944ba..c25da39df707 100644 --- a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt +++ b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt @@ -8,7 +8,9 @@ The reset controller registers are part of the system-ctl block on hi6220 SoC. Required properties: -- compatible: may be "hisilicon,hi6220-sysctrl" +- compatible: should be one of the following: + - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller. + - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller. - reg: should be register base and length as documented in the datasheet - #reset-cells: 1, see below