From patchwork Thu May 12 17:22:03 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Catalin Marinas X-Patchwork-Id: 67690 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp869943qge; Thu, 12 May 2016 10:22:16 -0700 (PDT) X-Received: by 10.66.199.66 with SMTP id ji2mr15745217pac.34.1463073736516; Thu, 12 May 2016 10:22:16 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 81si18572182pfr.50.2016.05.12.10.22.16; Thu, 12 May 2016 10:22:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752617AbcELRWM (ORCPT + 29 others); Thu, 12 May 2016 13:22:12 -0400 Received: from foss.arm.com ([217.140.101.70]:60261 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751402AbcELRWI (ORCPT ); Thu, 12 May 2016 13:22:08 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8C3FC3A; Thu, 12 May 2016 10:22:20 -0700 (PDT) Received: from e104818-lin.cambridge.arm.com (e104818-lin.cambridge.arm.com [10.1.203.148]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7D3623F252; Thu, 12 May 2016 10:22:06 -0700 (PDT) Date: Thu, 12 May 2016 18:22:03 +0100 From: Catalin Marinas To: Yury Norov Cc: arnd@arndb.de, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2] arm64: fix current_thread_info()->addr_limit setup Message-ID: <20160512172203.GL11226@e104818-lin.cambridge.arm.com> References: <1463069163-374-1-git-send-email-ynorov@caviumnetworks.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1463069163-374-1-git-send-email-ynorov@caviumnetworks.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 12, 2016 at 07:06:03PM +0300, Yury Norov wrote: > diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h > index 24ed037..fda75ce 100644 > --- a/arch/arm64/include/asm/elf.h > +++ b/arch/arm64/include/asm/elf.h > @@ -138,7 +138,10 @@ typedef struct user_fpsimd_state elf_fpregset_t; > */ > #define ELF_PLAT_INIT(_r, load_addr) (_r)->regs[0] = 0 > > -#define SET_PERSONALITY(ex) clear_thread_flag(TIF_32BIT); > +#define SET_PERSONALITY(ex) do { \ > + clear_thread_flag(TIF_32BIT); \ > + set_fs(TASK_SIZE_64); \ > +} while (0) > > #define ARCH_DLINFO \ > do { \ > @@ -181,7 +184,11 @@ typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; > ((x)->e_flags & EF_ARM_EABI_MASK)) > > #define compat_start_thread compat_start_thread > -#define COMPAT_SET_PERSONALITY(ex) set_thread_flag(TIF_32BIT); > +#define COMPAT_SET_PERSONALITY(ex) do { \ > + set_thread_flag(TIF_32BIT); \ > + set_fs(TASK_SIZE_32); \ > +} while (0) > + > #define COMPAT_ARCH_DLINFO > extern int aarch32_setup_vectors_page(struct linux_binprm *bprm, > int uses_interp); > diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h > index 0685d74..5b269e6 100644 > --- a/arch/arm64/include/asm/uaccess.h > +++ b/arch/arm64/include/asm/uaccess.h > @@ -60,7 +60,7 @@ extern int fixup_exception(struct pt_regs *regs); > #define KERNEL_DS (-1UL) > #define get_ds() (KERNEL_DS) > > -#define USER_DS TASK_SIZE_64 > +#define USER_DS TASK_SIZE We can avoid the USER_DS change as long as SET_PERSONALITY updates the thread's addr_limit. There are very few explicit set_fs(USER_DS) calls and they are on the thread exit path (or exec). That's unless we try to make a generic set_fs(USER_DS) addition to something like setup_new_exec() and we wouldn't need the SET_PERSONALITY changes: > #define get_fs() (current_thread_info()->addr_limit) > > static inline void set_fs(mm_segment_t fs) > diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c > index 8062482..2b25930 100644 > --- a/arch/arm64/kernel/process.c > +++ b/arch/arm64/kernel/process.c > @@ -211,17 +211,13 @@ static void tls_thread_flush(void) > { > asm ("msr tpidr_el0, xzr"); > > - if (is_compat_task()) { > - current->thread.tp_value = 0; > - > - /* > - * We need to ensure ordering between the shadow state and the > - * hardware state, so that we don't corrupt the hardware state > - * with a stale shadow state during context switch. > - */ > - barrier(); > - asm ("msr tpidrro_el0, xzr"); > - } > + /* > + * We need to ensure ordering between the shadow state and the > + * hardware state, so that we don't corrupt the hardware state > + * with a stale shadow state during context switch. > + */ > + barrier(); > + asm ("msr tpidrro_el0, xzr"); > } Why did you dropped tp_value initialisation? Context switching on native 64-bit tasks rely on copying the tpidr_el0 in and out of tp_value. However, compat tasks use the read-only tpidrro_el0 register set explicitly via a system call. Until this call happens, the TLS register would contain some garbage after the thread has been switched back in. -- Catalin diff --git a/fs/exec.c b/fs/exec.c index c4010b8207a1..54cc537f5986 100644 --- a/fs/exec.c +++ b/fs/exec.c @@ -1226,6 +1226,9 @@ EXPORT_SYMBOL(would_dump); void setup_new_exec(struct linux_binprm * bprm) { + /* set the address limit for the new executable */ + set_fs(USER_DS); + arch_pick_mmap_layout(current->mm); /* This is the point of no return */