From patchwork Mon Nov 11 07:50:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 179059 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp6308210ilf; Sun, 10 Nov 2019 23:53:04 -0800 (PST) X-Google-Smtp-Source: APXvYqzckfNSZBOWFKJSbszMN1sCmeLwiezR7XtHGHvMu8mEMBktoSy/4M1MrXpw6O4CIH/tydA5 X-Received: by 2002:aa7:c159:: with SMTP id r25mr9466525edp.118.1573458784073; Sun, 10 Nov 2019 23:53:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1573458784; cv=none; d=google.com; s=arc-20160816; b=c5cAYwWiOSDoJuB02uM+lSUBPEYfSZWiFuk7voMSFecTzWMpXpsVuKSrttbh6n+OFL 2iAAFXnah2KFYBb2d27e+BcWKLFJohrNUYGf3vr6MJ2I+9holleiyAdZRYiw3oWOqPIc 7D+6n2GzREDGToMLFLxQATXzYxbk3cqCg435+M6X3fUCS32dnLdGBGBSkCKFTJS4jMjR 8ySIBW99j/+cuOmkbomocCwYd8QYTKEWKWE/a+51J0OvsINNNbKxf6bBf11eQ4qvNqDV EiiWXjYIKf199Bcbe9mNUYVDa4Q0u9Fbg0qK5B6kjEbPfx2CasTRJ9LD3hI3B4SertpP LHsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:to:from; bh=bQLz0hn4/yJTl+O2LxrVnaOtkfK5GXthpDFmz8R3ck4=; b=dpPFlpuP3K7aXX8MJBF/18QFFrOK6jv6uvppHu5n4PLjL8KkCPQRltbCQaOGPcb97L x3dtZc8zgSDsgbErWKEh+eiziOunoI8RqvtMkOIz5kzfXZ+fRTbatmvURF/CXAK2Ujkx ipy5ocUpzS/WnqyMaMkANI8QH1TrMCy+5FJYhhITuIMFIjltVpGRNcd3rNXONVd5bI/F z8cUb5TSg+xKEmxo0f+cixd7HBA8ccQu1brj+iWk4zcGsIp3B/P6dxXU4xqPOFuATOB+ wqWwZx2SjaPV2WjRYJpZlpLv2w/5STLFK6p9wTi61y4OhPudnkgsCkFcCIB8R9XIyLSz KLpg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b20si9669290edx.344.2019.11.10.23.53.03; Sun, 10 Nov 2019 23:53:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726871AbfKKHww (ORCPT + 26 others); Mon, 11 Nov 2019 02:52:52 -0500 Received: from inva020.nxp.com ([92.121.34.13]:43554 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726360AbfKKHww (ORCPT ); Mon, 11 Nov 2019 02:52:52 -0500 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 85E671A0B09; Mon, 11 Nov 2019 08:52:50 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 9EC231A05F3; Mon, 11 Nov 2019 08:52:45 +0100 (CET) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 4ADC7402F1; Mon, 11 Nov 2019 15:52:39 +0800 (SGT) From: Shengjiu Wang To: timur@kernel.org, nicoleotsuka@gmail.com, Xiubo.Lee@gmail.com, festevam@gmail.com, lgirdwood@gmail.com, broonie@kernel.org, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH V2] ASoC: fsl_audmix: Add spin lock to protect tdms Date: Mon, 11 Nov 2019 15:50:48 +0800 Message-Id: <1e706afe53fdd1fbbbc79277c48a98f8416ba873.1573458378.git.shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Audmix support two substream, When two substream start to run, the trigger function may be called by two substream in same time, that the priv->tdms may be updated wrongly. The expected priv->tdms is 0x3, but sometimes the result is 0x2, or 0x1. Fixes: be1df61cf06e ("ASoC: fsl: Add Audio Mixer CPU DAI driver") Cc: Signed-off-by: Shengjiu Wang Acked-by: Nicolin Chen --- Change in v2 -add Fixes, Cc stable, and Acked-by. sound/soc/fsl/fsl_audmix.c | 6 ++++++ sound/soc/fsl/fsl_audmix.h | 1 + 2 files changed, 7 insertions(+) -- 2.21.0 Reviewed-by: Daniel Baluta diff --git a/sound/soc/fsl/fsl_audmix.c b/sound/soc/fsl/fsl_audmix.c index c7e4e9757dce..a1db1bce330f 100644 --- a/sound/soc/fsl/fsl_audmix.c +++ b/sound/soc/fsl/fsl_audmix.c @@ -286,6 +286,7 @@ static int fsl_audmix_dai_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { struct fsl_audmix *priv = snd_soc_dai_get_drvdata(dai); + unsigned long lock_flags; /* Capture stream shall not be handled */ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) @@ -295,12 +296,16 @@ static int fsl_audmix_dai_trigger(struct snd_pcm_substream *substream, int cmd, case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + spin_lock_irqsave(&priv->lock, lock_flags); priv->tdms |= BIT(dai->driver->id); + spin_unlock_irqrestore(&priv->lock, lock_flags); break; case SNDRV_PCM_TRIGGER_STOP: case SNDRV_PCM_TRIGGER_SUSPEND: case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + spin_lock_irqsave(&priv->lock, lock_flags); priv->tdms &= ~BIT(dai->driver->id); + spin_unlock_irqrestore(&priv->lock, lock_flags); break; default: return -EINVAL; @@ -491,6 +496,7 @@ static int fsl_audmix_probe(struct platform_device *pdev) return PTR_ERR(priv->ipg_clk); } + spin_lock_init(&priv->lock); platform_set_drvdata(pdev, priv); pm_runtime_enable(dev); diff --git a/sound/soc/fsl/fsl_audmix.h b/sound/soc/fsl/fsl_audmix.h index 7812ffec45c5..479f05695d53 100644 --- a/sound/soc/fsl/fsl_audmix.h +++ b/sound/soc/fsl/fsl_audmix.h @@ -96,6 +96,7 @@ struct fsl_audmix { struct platform_device *pdev; struct regmap *regmap; struct clk *ipg_clk; + spinlock_t lock; /* Protect tdms */ u8 tdms; };