From patchwork Thu Oct 24 14:08:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 177517 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2249647ill; Thu, 24 Oct 2019 07:13:21 -0700 (PDT) X-Google-Smtp-Source: APXvYqyH3777EbpPrutikuBlZhLy1WovDSXYAiqK6QPDKtDxQ9IxsIgSfzQZlscAGRUrkWIwY3lA X-Received: by 2002:a17:906:7c57:: with SMTP id g23mr38055836ejp.116.1571926401642; Thu, 24 Oct 2019 07:13:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571926401; cv=none; d=google.com; s=arc-20160816; b=pyrMmuB8uE9PQuDBezLZU8YihuxDZETCj+uK4+PGuLi6qMwLYQ6XICcv20vdgcvEt1 GzTYXLB7IFO/QdXxZOWF8e+pXrlx3dT2VP4IOMejU+H09EwPe2cIvATrzUz4AI+y9CiS 3XS3hO92t122HQa7iaya0luRYW9+sw4TjlJuZK07PtEwLWgC8bkEOwuL/8C5aRcofj8b HGg6Xbul4hIx72B7NOVA5cyhIBMeS2MwjnwRMKFHLIWEzpBzEoguR5XUq+C0iYPFQKYX 6626eN/3kQGa6fq5TqznwBngjNd0xisgkQFzrf4FXoRKsZfG++PRQd+tAqgy66xkA1I/ G2lw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=rUCy0US1o8lGrV47tXlj9moDifDnqM31y9Roq/EJg2o=; b=GdcmYNMaAsviLo5otO+x4ru4bw9DKBskJFu0gkd/27w+mn62NjxZsxrvyAYh2leqGn kyraXi3G9w1mmCpJqPM9JOYRmZmKuMO8QgueUh/I2MQZX2SKtCpIyY9VvlcrVa6HJtNm KLTUhX7VImhsK4MUl2KuAQNmA9jQIieX6iqwNGhYkfezq5x8kHS9Xwp/WAnr+HIjK2dL YKWNHHKTfuzQ4nJkEwOdETyIZOrqi+lgF+0RwEcXYq+he/i6cAa+S/0+W8LGiCmYwdpQ iGM43wRhy8rTbs/XVXfGlJMOQPSbX441+DLZoleeTzU8aYIvvyOeqAGd8xKPtsaI6X4U 11dg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v15si1667367edc.148.2019.10.24.07.13.21; Thu, 24 Oct 2019 07:13:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2502681AbfJXONS (ORCPT + 26 others); Thu, 24 Oct 2019 10:13:18 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:5155 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2389916AbfJXOLg (ORCPT ); Thu, 24 Oct 2019 10:11:36 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 44DD4B3BD7F8C7BC19CC; Thu, 24 Oct 2019 22:11:30 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.439.0; Thu, 24 Oct 2019 22:11:24 +0800 From: John Garry To: , CC: , , , Xiang Chen , "John Garry" Subject: [PATCH v2 02/18] scsi: hisi_sas: Set the BIST init value before enabling BIST Date: Thu, 24 Oct 2019 22:08:09 +0800 Message-ID: <1571926105-74636-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1571926105-74636-1-git-send-email-john.garry@huawei.com> References: <1571926105-74636-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Xiang Chen If set the BIST init value after enabling BIST, there may be still some few error bits. According to the process, need to set the BIST init value before enabling BIST. Fixes: 97b151e75861 ("scsi: hisi_sas: Add BIST support for phy loopback") Signed-off-by: Xiang Chen Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index cb8d087762db..cc594937fa8d 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -3022,11 +3022,6 @@ static int debugfs_set_bist_v3_hw(struct hisi_hba *hisi_hba, bool enable) hisi_sas_phy_write32(hisi_hba, phy_id, SAS_PHY_BIST_CTRL, reg_val); - mdelay(100); - reg_val |= (CFG_RX_BIST_EN_MSK | CFG_TX_BIST_EN_MSK); - hisi_sas_phy_write32(hisi_hba, phy_id, - SAS_PHY_BIST_CTRL, reg_val); - /* set the bist init value */ hisi_sas_phy_write32(hisi_hba, phy_id, SAS_PHY_BIST_CODE, @@ -3035,6 +3030,11 @@ static int debugfs_set_bist_v3_hw(struct hisi_hba *hisi_hba, bool enable) SAS_PHY_BIST_CODE1, SAS_PHY_BIST_CODE1_INIT); + mdelay(100); + reg_val |= (CFG_RX_BIST_EN_MSK | CFG_TX_BIST_EN_MSK); + hisi_sas_phy_write32(hisi_hba, phy_id, + SAS_PHY_BIST_CTRL, reg_val); + /* clear error bit */ mdelay(100); hisi_sas_phy_read32(hisi_hba, phy_id, SAS_BIST_ERR_CNT);