From patchwork Mon Sep 30 14:33:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 174757 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp7216363ill; Mon, 30 Sep 2019 07:37:08 -0700 (PDT) X-Google-Smtp-Source: APXvYqwkme3mx6g9jKlvaNaaL0TNgEACijEb2DXE25aDFDbDSozWzBl8PKSTaiOT4toZBALsuybC X-Received: by 2002:aa7:d883:: with SMTP id u3mr19880640edq.281.1569854228400; Mon, 30 Sep 2019 07:37:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569854228; cv=none; d=google.com; s=arc-20160816; b=b7F3xc6TVaQlD4qxO93SkcuJ1PZdEYnlf87U7b6WuejILCTepSdfHf/6KBXiV6qlu5 SV+ZnqQ72fYZcTKhmooKhO18JTg1vypqIrlpBH3chTRAKNmg+kqQhDy7nXVhiIooXlmX eP6o9/R9ML7MMExcLcA4WWU1h6QdmZLY6DyP+nnbbw8jVaOsIcZhSwnVCx12im4AqCZn /m4RvOt8UT5uxJxSiqjh6RpWOtmHQbRkxFFY0THSXMgkGoVdklga9geQlRa0ZvebiDuJ cuhWPMKArYxpEMJxEn/+Ln6lte+yGCTONgqZldwCYYtJewpl18sE+7dMeX88CKHMzFZ5 WsjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=te7WIQEkBQtGebL6A8E1BIyGc+OLbuFvUyAXnlX1CmU=; b=g990Kz6zuptl3z8DWGRP2zMFY4tHQBznpBc8uw7V9RcmNRjrkpnWNMorUi35QXVEEk 3TYWHELKAFlrwTzBI4FZ15DfJMaD0r+1OW8mufGnJRnHgYCNETQRvN9XRUoks32+zqX8 9lNABivqZoOlbdlz3p4C2bZvXvlVHO0kDKNP4GK7zyBq9OxsX008FU1RixaVlWyl1F2/ jN1/56l3i3Q9/2OoywqkX2EijTgxRa0OmN2kaybfHK1+9y8XoMxo6vGxYqpvF2DoK/fy 8Q63uL+gJ9s/41EMfSUADKXGflZv/iWMk/ewewup2em0mM5wSA8y/PsSJwJsCKahAk5M +jsw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x9si6790638eju.147.2019.09.30.07.37.08; Mon, 30 Sep 2019 07:37:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731818AbfI3OhE (ORCPT + 27 others); Mon, 30 Sep 2019 10:37:04 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:3195 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1731715AbfI3OhD (ORCPT ); Mon, 30 Sep 2019 10:37:03 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 40F62D0A7B7A024C01A2; Mon, 30 Sep 2019 22:36:58 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.439.0; Mon, 30 Sep 2019 22:36:48 +0800 From: John Garry To: , , , , , CC: , , , , , , , , John Garry Subject: [RFC PATCH 2/6] iommu/arm-smmu-v3: Record IIDR in arm_smmu_device structure Date: Mon, 30 Sep 2019 22:33:47 +0800 Message-ID: <1569854031-237636-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1569854031-237636-1-git-send-email-john.garry@huawei.com> References: <1569854031-237636-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To allow other devices know the SMMU HW IIDR, record the IIDR contents as the first member of the arm_smmu_device structure. In storing as the first member, it saves exposing SMMU APIs, which are nicely self-contained today. Signed-off-by: John Garry --- drivers/iommu/arm-smmu-v3.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.17.1 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 40f4757096c3..1ed3ef0f1ec3 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -70,6 +70,8 @@ #define IDR1_SSIDSIZE GENMASK(10, 6) #define IDR1_SIDSIZE GENMASK(5, 0) +#define ARM_SMMU_IIDR 0x18 + #define ARM_SMMU_IDR5 0x14 #define IDR5_STALL_MAX GENMASK(31, 16) #define IDR5_GRAN64K (1 << 6) @@ -546,6 +548,7 @@ struct arm_smmu_strtab_cfg { /* An SMMUv3 instance */ struct arm_smmu_device { + u32 iidr; /* must be first member */ struct device *dev; void __iomem *base; @@ -3153,6 +3156,8 @@ static int arm_smmu_device_probe(struct platform_device *pdev) iommu_device_set_ops(&smmu->iommu, &arm_smmu_ops); iommu_device_set_fwnode(&smmu->iommu, dev->fwnode); + smmu->iidr = readl(smmu->base + ARM_SMMU_IIDR); + ret = iommu_device_register(&smmu->iommu); if (ret) { dev_err(dev, "Failed to register iommu\n");