From patchwork Fri Apr 19 18:00:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 162536 Delivered-To: patches@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp2275804jan; Fri, 19 Apr 2019 11:00:05 -0700 (PDT) X-Received: by 2002:a62:1d94:: with SMTP id d142mr5335539pfd.83.1555696805708; Fri, 19 Apr 2019 11:00:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1555696805; cv=none; d=google.com; s=arc-20160816; b=bnhymxe1tIE3jMBOxtfTkIq/gaMdNP4FqIBPP63mBdMC283gdab+/Lg3d29ub61fPi UpvawlsK2JyFz/P4HGcX6ltVXej/XRj5bQMTxSakvDteBHfkc57WFUStjJ+PD0YgPKfj 1Ej+DaNGQiBwGri4S7Nppn7zFmCm6ANp+UoIBaJWIaKPQaFV6/c9YZio61Yf4HCQnszA x8vWevjWZHjgqq8vj/+pFAttcwAAUA+jmNfVx+7SbEWFv0KhWjD0TuRRG2xsDQYB/b1N P7uivuLupCbgeY6eduNqdb7wfqBgqwWYZ9kpnDehhhFicsdvETpGrMt/HX/QvuN8kMvz 9VFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:cc:to:from:dkim-signature; bh=nj20xMbOiR4njzRpU9pd8U3u7JqbjbpoQeo6wrWiKUM=; b=TnbcObrstdUsPKZrKwJEs1WLewjupTKczXbKP+F0J3r29gK+vIeTLXMOH0GfuOIMPx xA9/5Wvp53Wv4V8vk42BRQZa6sC4LqfFnaz0Mo+gl1SfQ6pIwz9v/170oZegP7lojhu/ 6Dl4lXICuAUM/MCd+XQyePt05RlPnG8kKh3ilaexj8bYuUjNyNWIjOaaRurcSL3C4Zho mBD2c8DtRtJteQZxkeuXC3aiylOmmswm3v4XTI7+FBIQnbb4WbAAh4KNZ1Jn+oa7smIe erBwd+sXkP9UYNEkuM32dmtNrb22AtsscUoqyACSxFGUG4Dqc3vLyCeiPM1BrV6OpPZV L/mQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="i/oL4Xpi"; spf=pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id a8sor1300966ple.51.2019.04.19.11.00.05 for (Google Transport Security); Fri, 19 Apr 2019 11:00:05 -0700 (PDT) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="i/oL4Xpi"; spf=pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=nj20xMbOiR4njzRpU9pd8U3u7JqbjbpoQeo6wrWiKUM=; b=i/oL4XpiFE0mQsjwmNOMFL7+oT0QPZEHoNCCWcrnIzGqVup023mTwyVByRjAAlAG1/ M6fgQr1MitkgwVThu9VhubVic8pv4eNnA5mkG2cc9xwfS4uv6/cbY4ibMCVGte1eB806 Y4TE6eIjAeWziKHb/LeVQYDoGbUWDqeuovzHp4RPoEalaK2ATCs/08lZf1++J7GcHr9x trnLc+fWmUqIN82yL9h+71j0f0B26jhX2/QKU3y1aM9NmIQ94eCgWQKSHzsoTOHXEEd9 797FUpTn4odqz7SOeiN1gJbr3PJLSe9mPtpwR2gYkI5/4bdhZgf5cNhjxRj/CuI0T7Tb wWiw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=nj20xMbOiR4njzRpU9pd8U3u7JqbjbpoQeo6wrWiKUM=; b=G4wIJXo1pN0vVC9wjmGjLxRjb5ly5s4NBh/cybxaM7UVa7eWhyUVuNIBl+xiplNhSD gL3nR62wv9XgTCtUPSsjssYrkXyUh1L3q+K5AQ0YHgXSSE1rNnB3h1zqdUAsk7LImBw8 BwHvg9c7njwKkiDR1iD3dCnoKUAguSwMIV2EsTqZ6IlY7i7kw0Tj7DOImJ6uB4dgCisL gMiooQSuqKUfwh4vs5bkpUkR3BVCQsYIgnteyBJxrvUSnDbOhQFhXVAjyiRtjXz2cwv7 RWKEiNcDKzdf4EUjcTYbnSWBFkhy2nY80qGCbtC7AEwNpQg8gwKcZmZXcXsGCDPkwAQo ueuw== X-Gm-Message-State: APjAAAUNS0Wkv7BgFpFzf5t8i4MhSL4r3uHFVk8qmzcD21rP068x88O6 Ye09Bm1GVtGi7/jKHvPeTi1M8w/p X-Google-Smtp-Source: APXvYqygjQrqQVFkVOsEC4wg6n+XrBF44gDTyGi2nuXU+12+myTQiOLsrQtN68VAd3utyNJcniRUVQ== X-Received: by 2002:a17:902:8a4:: with SMTP id 33mr5176440pll.7.1555696805063; Fri, 19 Apr 2019 11:00:05 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([2601:1c2:680:1319:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id m7sm5829688pgg.62.2019.04.19.11.00.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 19 Apr 2019 11:00:04 -0700 (PDT) From: John Stultz To: lkml Cc: Da Lv , Xinliang Liu , Rongrong Zou , Xinwei Kong , Chen Feng , David Airlie , Daniel Vetter , dri-devel , Yidong Lin , John Stultz Subject: [PATCH] drm: kirin: Fix for hikey620 display offset problem Date: Fri, 19 Apr 2019 11:00:00 -0700 Message-Id: <1555696800-15961-1-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 From: Da Lv The original HiKey (620) board has had a long running issue where when using a 1080p montior, the display would occasionally blink and come come back with a horizontal offset (usually also shifting the colors, depending on the value of the offset%4). After lots of analysis by HiSi developers, they found the issue was due to when running at 1080p, it was possible to hit the device memory bandwidth limits, which could cause the DSI signal to get out of sync. Unfortunately the DSI logic doesn't have the ability to automatically recover from this situation, but we can get a an LDI underflow interrupt when it happens. To then correct the issue, when we get an LDI underflow irq, we we can simply suspend and resume the display, which resets the hardware. Thus, this patch enables the ldi underflow interrupt, and initializes a workqueue that is used to suspend/resume the display to recover. Then when the irq occurs we clear it and schedule the workqueue to reset display engine. Cc: Xinliang Liu Cc: Rongrong Zou Cc: Xinwei Kong Cc: Chen Feng Cc: David Airlie Cc: Daniel Vetter Cc: dri-devel Signed-off-by: Da Lv Signed-off-by: Yidong Lin [jstultz: Reworded the commit message, checkpatch cleanups] Signed-off-by: John Stultz Change-Id: I792ce0b50a1c941d94d8cbec6b52c0f838d967bd --- drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h | 6 ++++++ drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 23 +++++++++++++++++++++++ 2 files changed, 29 insertions(+) -- 2.7.4 Reviewed-by: Xinliang Liu diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h b/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h index 4cf281b7..ced40c6 100644 --- a/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h @@ -87,6 +87,7 @@ #define VSIZE_OFST 20 #define LDI_INT_EN 0x741C #define FRAME_END_INT_EN_OFST 1 +#define UNDERFLOW_INT_EN_OFST 2 #define LDI_CTRL 0x7420 #define BPP_OFST 3 #define DATA_GATE_EN BIT(2) @@ -97,6 +98,11 @@ #define LDI_HDMI_DSI_GT 0x7434 /* + *BIT_LDI_UNFLOW + */ +#define BIT_LDI_UNFLOW BIT(2) + +/* * ADE media bus service regs */ #define ADE0_QOSGENERATOR_MODE 0x010C diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c index 73611a9..1d935ab 100644 --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c @@ -58,6 +58,7 @@ struct ade_hw_ctx { struct ade_crtc { struct drm_crtc base; struct ade_hw_ctx *ctx; + struct work_struct drm_device_wq; bool enable; u32 out_format; }; @@ -176,6 +177,7 @@ static void ade_init(struct ade_hw_ctx *ctx) */ ade_update_bits(base + ADE_CTRL, FRM_END_START_OFST, FRM_END_START_MASK, REG_EFFECTIVE_IN_ADEEN_FRMEND); + ade_update_bits(base + LDI_INT_EN, UNDERFLOW_INT_EN_OFST, MASK(1), 1); } static bool ade_crtc_mode_fixup(struct drm_crtc *crtc, @@ -345,6 +347,18 @@ static void ade_crtc_disable_vblank(struct drm_crtc *crtc) MASK(1), 0); } +static void drm_underflow_wq(struct work_struct *work) +{ + struct ade_crtc *acrtc = container_of(work, struct ade_crtc, + drm_device_wq); + struct drm_device *drm_dev = (&acrtc->base)->dev; + void __iomem *base = acrtc->ctx->base; + struct drm_atomic_state *state; + + state = drm_atomic_helper_suspend(drm_dev); + drm_atomic_helper_resume(drm_dev, state); +} + static irqreturn_t ade_irq_handler(int irq, void *data) { struct ade_crtc *acrtc = data; @@ -362,6 +376,12 @@ static irqreturn_t ade_irq_handler(int irq, void *data) MASK(1), 1); drm_crtc_handle_vblank(crtc); } + if (status & BIT_LDI_UNFLOW) { + ade_update_bits(base + LDI_INT_CLR, UNDERFLOW_INT_EN_OFST, + MASK(1), 1); + DRM_ERROR("LDI underflow!"); + schedule_work(&acrtc->drm_device_wq); + } return IRQ_HANDLED; } @@ -1038,6 +1058,9 @@ static int ade_drm_init(struct platform_device *pdev) /* vblank irq init */ ret = devm_request_irq(dev->dev, ctx->irq, ade_irq_handler, IRQF_SHARED, dev->driver->name, acrtc); + + INIT_WORK(&acrtc->drm_device_wq, drm_underflow_wq); + if (ret) return ret;