From patchwork Fri Jan 25 14:22:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 156599 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp418146jaa; Fri, 25 Jan 2019 06:22:52 -0800 (PST) X-Google-Smtp-Source: ALg8bN6lV4DcWJRDV/Gwgk4zxJoRuyaVRy3O4Pzt2C1hEJTpMCN+cEuZndc4XieX4lVBrZsJtu+2 X-Received: by 2002:a62:4e83:: with SMTP id c125mr11292050pfb.101.1548426172085; Fri, 25 Jan 2019 06:22:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1548426172; cv=none; d=google.com; s=arc-20160816; b=pX6L8NxVDZWMUKk+Vmb4ByHL45WnBR0rZtpFFO7qsI1EWOvwIERbRlOMqHIBTSvLZo CXEUH9v4RYz4ptWvEFDI7tjlhEPOEOsFdaxKX5vA6C/a9arDOBezFVcotkHAduRyPwDC kOFuthWDTU4ranaovyGd8bicwwPEC8vRxTFPivg1Eh2YxYhQWg6ZrbCJU2lgGfu6RYpy ixncg8TkWe4ZkMCiyw1x8N2HHB+SOxKvMoHIuJAIQNwalxZqaLxSGjqcbSFAQGPz+Dg+ pjH9cIT9CCLMB955r75ADLqaWvVsG6BQTEseOI0GoikMYuqGVq6aSNzD2ss9gGSnhAPh SEvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=R3t3d6cK5EIEZHIK9qMM01uF3eAVUR0GS1fjeoFPBPE=; b=CtYd62JG+iNqXNvXyI1mxd5z9bdG0ATi9WjkoRXAzjQKsQU9nKDJLK8czHZLVOvux5 rUz17P+FV8DPSKw1nog576imzP2HVRpZkcORP/59SaZHO7rscgOKrzkh7OL0Ltirk5x9 WkYDnjOGhG04KFI3JHt7g/HJbI55XvW8q81IXxuHr40tmwYaR8C+ttwP5C2CyKZ4HOLG VO1s79iexD/52OUZpNrUdvT9MN/PQAOmg1UEdmSjqhS7H63p6Bz8obG5Hbb79BDwKjhX gWO1D3ZbUvydOYe5kIpvXiaTR605CyFma2BuE1YgjuC1zoR6Tfy3BZ0CFzKRD1IslP8u gF7A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l5si24016089plt.5.2019.01.25.06.22.51; Fri, 25 Jan 2019 06:22:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729215AbfAYOWn (ORCPT + 31 others); Fri, 25 Jan 2019 09:22:43 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:2766 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728917AbfAYOWH (ORCPT ); Fri, 25 Jan 2019 09:22:07 -0500 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 5FA1568C4132576BA01C; Fri, 25 Jan 2019 22:21:59 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.408.0; Fri, 25 Jan 2019 22:21:51 +0800 From: John Garry To: , CC: , , , Xiang Chen , "John Garry" Subject: [PATCH 05/13] scsi: hisi_sas: shutdown axi bus to avoid exception CQ returned Date: Fri, 25 Jan 2019 22:22:31 +0800 Message-ID: <1548426159-225679-6-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1548426159-225679-1-git-send-email-john.garry@huawei.com> References: <1548426159-225679-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Xiang Chen When injecting 2 bit ECC error, it will cause fatal AXI interrupts. Before the recovery of SAS controller reset, the internal of SAS controller is in error. If CQ interrupts return at the time, actually it is exception CQ interrupt, and it may cause resource release in disorder. To avoid the exception situation, shutdown AXI bus after fatal AXI interrupt. In SAS controller reset, it will restart AXI bus. For later version of v3 hw, hardware will shutdown AXI bus for this situation, so just fix current ver of v3 hw. Signed-off-by: Xiang Chen Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 1.9.1 diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 726ac4bd..d5eabfc 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -1646,6 +1646,7 @@ static irqreturn_t fatal_axi_int_v3_hw(int irq_no, void *p) u32 irq_value, irq_msk; struct hisi_hba *hisi_hba = p; struct device *dev = hisi_hba->dev; + struct pci_dev *pdev = hisi_hba->pci_dev; int i; irq_msk = hisi_sas_read32(hisi_hba, ENT_INT_SRC_MSK3); @@ -1677,6 +1678,17 @@ static irqreturn_t fatal_axi_int_v3_hw(int irq_no, void *p) error->msg, irq_value); queue_work(hisi_hba->wq, &hisi_hba->rst_work); } + + if (pdev->revision < 0x21) { + u32 reg_val; + + reg_val = hisi_sas_read32(hisi_hba, + AXI_MASTER_CFG_BASE + + AM_CTRL_GLOBAL); + reg_val |= AM_CTRL_SHUTDOWN_REQ_MSK; + hisi_sas_write32(hisi_hba, AXI_MASTER_CFG_BASE + + AM_CTRL_GLOBAL, reg_val); + } } if (irq_value & BIT(ENT_INT_SRC3_ITC_INT_OFF)) {