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[209.85.220.65]) by mx.google.com with SMTPS id z1sor12454938pfl.9.2019.01.24.12.24.37 for (Google Transport Security); Thu, 24 Jan 2019 12:24:37 -0800 (PST) Received-SPF: pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SzoX7d+H; spf=pass (google.com: domain of john.stultz@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=john.stultz@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=o5vW46nrjFVoZsnMcgT1mEReDdf43fF1J2psQEiWFOU=; b=SzoX7d+HKT5NucVKzZ22vuD4IMyi0BUeNEq+nZsXxgjwCVzKVfDBPnrJjg9VIXt4FV ESbJQqmYfE47OwYqfFizlKN95G5CdKqjuagakR0MmwNaLmoQCmTUvHdmuWZS+VbPhetq hQUngAFjUQ7/6Zm468Hmlhpzg7Q3xIUJTjHrg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=o5vW46nrjFVoZsnMcgT1mEReDdf43fF1J2psQEiWFOU=; b=oRamkndp62HPk4BoxA1ZPfl5vEIV/7VW+bIbDnHoD46InKIcpwxnRZEWyXvJyEkGPN HV3YiHUdZmXwyVTA9/VjgtZ2LPBksvHcsijjEXkYqTYtYkYJTz6bzIkQZe+COeqd48GA Ay3OJiR/hcisQSOkqVNrEi23PEps+xQZ4QxZK5DPY+1pXLi9I8Sj+AkKsqHHG32xvTJ9 Y+u5HMlxqn48zVwIyhQ0qp4H2qzl7JpVBJpjDvqcBfmwOqTne4DfKpMs3/BqWGvcefcU OvRZoNo3UTCllpsdUiwyoomOOZE2GEbL/bUL18c9S9pblHMBKtZHIck2Lz+qhtOxxIqf jd5Q== X-Gm-Message-State: AJcUukduSa3pGvqplZ86KTBqJHiMDDZB08IH7RhoRPBVkzQvqaHzt4EV /vTAyi4oLYKBn6rRUFg+e7isykH8 X-Google-Smtp-Source: ALg8bN53AUnDLmlfA5CanT+1yUS8gKuszSeTS3DYr7MsI/bOcmzSj4lSCbjz6YablM37qmPTUwrN5Q== X-Received: by 2002:a62:37c3:: with SMTP id e186mr8138281pfa.251.1548361477400; Thu, 24 Jan 2019 12:24:37 -0800 (PST) Return-Path: Received: from localhost.localdomain ([2601:1c2:680:1319:4e72:b9ff:fe99:466a]) by smtp.gmail.com with ESMTPSA id c72sm45263309pfb.107.2019.01.24.12.24.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 24 Jan 2019 12:24:36 -0800 (PST) From: John Stultz To: lkml Cc: John Stultz , Tanglei Han , Zhuangluan Su , Ryan Grachek , Manivannan Sadhasivam , Wei Xu , Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH 6/8 v5] arm64: dts: hi3660: Add dma to uart nodes Date: Thu, 24 Jan 2019 12:24:21 -0800 Message-Id: <1548361463-28372-7-git-send-email-john.stultz@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1548361463-28372-1-git-send-email-john.stultz@linaro.org> References: <1548361463-28372-1-git-send-email-john.stultz@linaro.org> Try to add DMA support to the uart nodes following the assignments made in the dts from the victoria vendor kernel here: https://consumer.huawei.com/en/opensource/detail/?siteCode=worldwide&keywords=p10&fileType=openSourceSoftware&pageSize=10&curPage=1 Cc: Tanglei Han Cc: Zhuangluan Su Cc: Ryan Grachek Cc: Manivannan Sadhasivam Cc: Wei Xu Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Acked-by: Manivannan Sadhasivam Signed-off-by: John Stultz --- v3: * Remove dma enablment on uart0 which would use reserved channel 0 --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.7.4 diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 20ae40d..4c8d682 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -478,6 +478,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf00000 0x0 0x1000>; interrupts = ; + dma-names = "rx", "tx"; + dmas = <&dma0 2 &dma0 3>; clocks = <&crg_ctrl HI3660_CLK_GATE_UART1>, <&crg_ctrl HI3660_CLK_GATE_UART1>; clock-names = "uartclk", "apb_pclk"; @@ -490,6 +492,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf03000 0x0 0x1000>; interrupts = ; + dma-names = "rx", "tx"; + dmas = <&dma0 4 &dma0 5>; clocks = <&crg_ctrl HI3660_CLK_GATE_UART2>, <&crg_ctrl HI3660_PCLK>; clock-names = "uartclk", "apb_pclk"; @@ -514,6 +518,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf01000 0x0 0x1000>; interrupts = ; + dma-names = "rx", "tx"; + dmas = <&dma0 6 &dma0 7>; clocks = <&crg_ctrl HI3660_CLK_GATE_UART4>, <&crg_ctrl HI3660_CLK_GATE_UART4>; clock-names = "uartclk", "apb_pclk"; @@ -526,6 +532,8 @@ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xfdf05000 0x0 0x1000>; interrupts = ; + dma-names = "rx", "tx"; + dmas = <&dma0 8 &dma0 9>; clocks = <&crg_ctrl HI3660_CLK_GATE_UART5>, <&crg_ctrl HI3660_CLK_GATE_UART5>; clock-names = "uartclk", "apb_pclk";