From patchwork Fri Nov 9 01:42:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 150600 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1565652ljp; Thu, 8 Nov 2018 17:42:24 -0800 (PST) X-Google-Smtp-Source: AJdET5e17jEFz+k0ZPVb0vZ8XB+62X90B7pZCE+Op0GbV7YZJmeNXK78qZdZB5epZuW1gzNGiPKI X-Received: by 2002:a63:af45:: with SMTP id s5-v6mr5789397pgo.125.1541727742488; Thu, 08 Nov 2018 17:42:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541727742; cv=none; d=google.com; s=arc-20160816; b=neP81hzW9cCIPV6Uv2Br2ZmQiy+e/f8+TI6Q5qqm/RtLIOjYimNDLj67xZyJ9LE2U2 5dzo25gTFdBCUrYH6DFzYY4Kyaol24RMi6pZumxybUCqd7V9g5sGwwen4BpDr6aR5zwV d9MhY9yVBGrTpoX/zfmF/uHbDHvspLrmZpKeA3s7aYCbtQf9/cuIyjf9wXBKR1mXO/ig ug2iQYPHUkF9juYB8nKPDKH5nvSuc27sNMiKfFlDiNtuuJOySAeLELdQuASSJf9DkgHI g+Der+UmjavvkyQdoPgHNd5lwMlXlKtW5v2tOBFQbyfM5j/t8F7zf867RAhMdSCr00bi zDdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=9NQOPYXygvpAosetu1eAnaARvVdaH6YoUmgaUdOSKng=; b=IsI+0MpX040/VFCgmD+hIGBGywGO0EVSjDBEVIhCblFjLrUvn64w6h6fhttr1dZWTh HD5dhw2blHsPYarIvk7yhp2tJ6GeiOEFJsqXie20eP63besfzsHFiK/uYakBwzdq1+D3 mFo105NlQDiCdBMS5We/fzc2FQdFwvfiQHMLeRBMpLdi2BNhqDMPaqoz92LbyhplYisy 0s4viHYMpnt5+HVOh1TxvYWsTP4gcmmkrnwJP0gsArI3nffVcP0e1tyAe1K5NHN4Oo2d 8EETeW/3JiYl4VEe8Kq7+KQvEFSnuLRGH0ZvBXUgNujR72mJ6PuaTf19IMe34T2GxS2U +rEw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id bf4-v6si5853414plb.169.2018.11.08.17.42.22; Thu, 08 Nov 2018 17:42:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727736AbeKILUj (ORCPT + 32 others); Fri, 9 Nov 2018 06:20:39 -0500 Received: from mx.socionext.com ([202.248.49.38]:41458 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727196AbeKILUi (ORCPT ); Fri, 9 Nov 2018 06:20:38 -0500 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 09 Nov 2018 10:42:17 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 15462180D4F; Fri, 9 Nov 2018 10:42:18 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 9 Nov 2018 10:42:18 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id 6DA1E1A03A2; Fri, 9 Nov 2018 10:42:17 +0900 (JST) From: Kunihiko Hayashi To: Philipp Zabel , Rob Herring , Mark Rutland , Masahiro Yamada Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH 1/4] dt-bindings: reset: uniphier: Replace the expression of USB3 with generic peripherals Date: Fri, 9 Nov 2018 10:42:04 +0900 Message-Id: <1541727727-10821-2-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1541727727-10821-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1541727727-10821-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace the expression of "USB3 glue layer" with the glue layer of the generic peripherals to allow other devices to use it. The reset control belongs to this glue layer. Signed-off-by: Kunihiko Hayashi --- .../devicetree/bindings/reset/uniphier-reset.txt | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/reset/uniphier-reset.txt b/Documentation/devicetree/bindings/reset/uniphier-reset.txt index 101743d..f63c511 100644 --- a/Documentation/devicetree/bindings/reset/uniphier-reset.txt +++ b/Documentation/devicetree/bindings/reset/uniphier-reset.txt @@ -120,27 +120,27 @@ Example: }; -USB3 core reset ---------------- +Peripheral core reset in glue layer +----------------------------------- -USB3 core reset belongs to USB3 glue layer. Before using the core reset, -it is necessary to control the clocks and resets to enable this layer. -These clocks and resets should be described in each property. +Some peripheral core reset belongs to its own glue layer. Before using +this core reset, it is necessary to control the clocks and resets to enable +this layer. These clocks and resets should be described in each property. Required properties: - compatible: Should be - "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC - "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC - "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC - "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC + "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3 + "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3 + "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3 + "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3 - #reset-cells: Should be 1. - reg: Specifies offset and length of the register set for the device. -- clocks: A list of phandles to the clock gate for USB3 glue layer. +- clocks: A list of phandles to the clock gate for the glue layer. According to the clock-names, appropriate clocks are required. - clock-names: Should contain "gio", "link" - for Pro4 SoC "link" - for others -- resets: A list of phandles to the reset control for USB3 glue layer. +- resets: A list of phandles to the reset control for the glue layer. According to the reset-names, appropriate resets are required. - reset-names: Should contain "gio", "link" - for Pro4 SoC