From patchwork Wed Oct 10 03:51:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 148527 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp343696lji; Tue, 9 Oct 2018 20:52:33 -0700 (PDT) X-Google-Smtp-Source: ACcGV62fcJWfbr6lgf596t3M5CBCqBVe21VtXX5h6DMzIz/E7YtTx+duYvqbyaHmdlyQqZHZARTv X-Received: by 2002:a62:21d1:: with SMTP id o78-v6mr32725382pfj.235.1539143552868; Tue, 09 Oct 2018 20:52:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539143552; cv=none; d=google.com; s=arc-20160816; b=N9rDyuFlf7nQoqJLKmAHgdbGF116nuFLPumpUzrrmiGlAdyO3F7L3Z+4WD8mNgS+U/ 4s2Bh2AfqJZb07rFe8fo2iRRChvhm2CwtI2zlLrhT2tXb1WDu8Diz8BgFNAlAG0///34 MVOBX4vdgw8FTdswVuJbEEzYrC8XWJxipR0W1iFTtU/cpgLxhJvdwm1aQ+JVc7+ULzmf QIbiM8SgzXPdwU3nXnUTD90x32laL+hwKeCpdxmyhO3FmLSGajEYmXPg3dMqwWsVJF3E Vh3yJdlj9OKwkc2+FmU+kGW3pVYylBTa40UcRiVMYSTGEKZFjYd6YxLdBZAgBGFOlPCP y8iQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter; bh=9iNuA11QGszCWRWbyhbi0OF/6tEffh8se4mdynffqow=; b=bkU0tbWeERSvNP7CsyqP7qGYz4Kd1ToF8Ay2ix4R0mPq6ZaRTkxJ9yoJfBTsHEXIG8 BxpNVFaZZ/17734d2sHabvYTh+qepH4dXDrvmp33fK85ZZAisQk0N+ncIshzmIeXL/DU SHAHfPu9GH44FURvV/kiA8fWMpCpmBjOyo+lsks0wQNpgFIDyvgY3Xoq8Qo/MOWQNOMA Dx1uRpYfxULkNT+8K4NZxF4lzArd7HhXizXybT9TbG7wEgCFud73jN1wb7jpQsn8lIdI rYE+3BERPvfsLRi5OY2kMnSKuMsxDem4LQ7cEeLTgSZGTn5WiesIML56itFEriUvADmW 9PLQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=g6p1KaYV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m75-v6si23312857pga.481.2018.10.09.20.52.32; Tue, 09 Oct 2018 20:52:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=g6p1KaYV; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727333AbeJJLMi (ORCPT + 32 others); Wed, 10 Oct 2018 07:12:38 -0400 Received: from conuserg-11.nifty.com ([210.131.2.78]:61156 "EHLO conuserg-11.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725860AbeJJLMi (ORCPT ); Wed, 10 Oct 2018 07:12:38 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-11.nifty.com with ESMTP id w9A3pfev028281; Wed, 10 Oct 2018 12:51:43 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com w9A3pfev028281 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1539143503; bh=9iNuA11QGszCWRWbyhbi0OF/6tEffh8se4mdynffqow=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=g6p1KaYVxXckQGEgplO/kFg2N/X7zWX7SkGqApAg4LdXyA2Ju4CKisOq8lTE4fxac XcehBc/drEUzWIBYr+/HxP8Lo61yUF/iIsNzxeicr/kpVlBdnWn5kN53N5vvRX5KR8 mKMJBHt+mdwRsVZ//UyfvpqtI5PSFfO7/4DtCFlfVtATkzYOBC+7f2wfc20kv7+ya9 O6q+MmLYPltApdGN2H5nMwPxyhVfc8+/eyLlzbHqd+/1aNuuS3/XqrcuTjjOPQawks i2SY4oYMRgEUdtwefmq5bdcZZW8vSpyjMHGfDPpZkYl9fdI/0er0So/JNA3Q59SFPw dsdHCkjFCs0wQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Wolfram Sang , linux-mmc@vger.kernel.org Cc: Ulf Hansson , linux-renesas-soc@vger.kernel.org, Masahiro Yamada , Lee Jones , linux-kernel@vger.kernel.org Subject: [PATCH v3 2/2] mmc: tmio: remove TMIO_MMC_HAVE_HIGH_REG flag Date: Wed, 10 Oct 2018 12:51:32 +0900 Message-Id: <1539143492-32605-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539143492-32605-1-git-send-email-yamada.masahiro@socionext.com> References: <1539143492-32605-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org TMIO_MMC_HAVE_HIGH_REG is confusing due to its counter-intuitive name. All the TMIO MMC variants (TMIO MMC, Renesas SDHI, UniPhier SD) actually have high registers. It is just that each of them implements its own registers there. The original IP from Panasonic only defines registers 0x00-0xff in the bus_shift=1 review. The register area above them is platform-dependent. In fact, TMIO_MMC_HAVE_HIGH_REG is set only by tmio-mmc.c and used to test the accessibility of CTL_SDIO_REGS. Because it is specific to the TMIO MFD variant, the right thing to do is to move such registers to tmio_mmc.c and delete the TMIO_MMC_HAVE_HIGH_REG flag. Signed-off-by: Masahiro Yamada --- Changes in v3: None Changes in v2: None drivers/mmc/host/tmio_mmc.c | 7 +++++-- drivers/mmc/host/tmio_mmc.h | 3 --- include/linux/mfd/tmio.h | 7 ------- 3 files changed, 5 insertions(+), 12 deletions(-) -- 2.7.4 diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c index 00d291c..4e91020 100644 --- a/drivers/mmc/host/tmio_mmc.c +++ b/drivers/mmc/host/tmio_mmc.c @@ -24,6 +24,11 @@ #include "tmio_mmc.h" +/* Registers specific to this variant */ +#define CTL_SDIO_REGS 0x100 +#define CTL_CLK_AND_WAIT_CTL 0x138 +#define CTL_RESET_SDIO 0x1e0 + static void tmio_mmc_clk_start(struct tmio_mmc_host *host) { sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN | @@ -161,8 +166,6 @@ static int tmio_mmc_probe(struct platform_device *pdev) goto cell_disable; } - pdata->flags |= TMIO_MMC_HAVE_HIGH_REG; - host = tmio_mmc_host_alloc(pdev, pdata); if (IS_ERR(host)) { ret = PTR_ERR(host); diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index a1a661b..18b4308 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -47,9 +47,6 @@ #define CTL_RESET_SD 0xe0 #define CTL_VERSION 0xe2 #define CTL_SDIF_MODE 0xe6 -#define CTL_SDIO_REGS 0x100 -#define CTL_CLK_AND_WAIT_CTL 0x138 -#define CTL_RESET_SDIO 0x1e0 /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */ #define TMIO_STOP_STP BIT(0) diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index 7786621..1e70060 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -62,13 +62,6 @@ #define TMIO_MMC_USE_GPIO_CD BIT(5) /* - * Some controllers doesn't have over 0x100 register. - * it is used to checking accessibility of - * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL - */ -#define TMIO_MMC_HAVE_HIGH_REG BIT(6) - -/* * Some controllers have CMD12 automatically * issue/non-issue register */