From patchwork Mon Oct 1 12:31:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 147893 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp3849322lji; Mon, 1 Oct 2018 05:31:58 -0700 (PDT) X-Google-Smtp-Source: ACcGV62zxYWOEBSyH9PQGGOW6t/rjDg88u46wWVc+97Ks2+94qNQFLXagNfhCor7ktZwL+nZWmcB X-Received: by 2002:a63:1d10:: with SMTP id d16-v6mr1212365pgd.228.1538397118725; Mon, 01 Oct 2018 05:31:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1538397118; cv=none; d=google.com; s=arc-20160816; b=Wk1tNJd2iwjZjPlZGpZpAMvmIwl15Z2nRSTiTIqn5LAlM5DuhncJD5h+VbAi5PTy+T AzYfz/3ZNFbSOH1DCuDL0JHXOMdXtPopQLwhpYVUemZ/m1jT7fH1sZcZiOAok8xVT0ds QP5hAfKyGBkuxHn2M49ZmOo3M7ZeqJPkG3Jpdqjau6XvQuYILExqCgt3ek4jd73Q31Jn nM1aVfgyRYIxcYAfjUySD1lJEE7NGtyExcclgpZo7lmkm7P361uyffDF/dPI/jxGG5ON 104Tas5h1RZQg8EhM5jDdiIlYgqz/WGDj7jRgjyq45elZ/0VzBDH2aHBDkdVm4BHwE6d YmWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter; bh=PEzsMrwJXw0LoSxVFtwvUIo6tex365qXteYhXs9PfIk=; b=sCS+EVlN2qCsv3JjYahjhVXRWeLOLkOD6dRMM+/CvNposhvuG4HMN2Iegsq2XXppZN chLPFm86lzPCnvMk6thfcimi80BtG9V3Oz+bi/H4a7BenwRE9B7BlGTHggTu0yeUc52D 64sh8IFd6Ri76/eVAHMevB1VigB49izL9p6HsB+yCWPqMkTeaYTZ9paaSlLFy/jN85FK pkRMqYqMVMkF/ikoit0ojLW1Sm/FRwKEeWGhosPcN+JIjlPztGuVi0l3SvEoSloR1/Oh tiUOKxVl7HbEsQwZ3+fQB+eMwOoYQAulbuf+HuXgDQz3C6g1z65BKE+OAWiELIMseorK HQRA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=Lad5CemX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k26-v6si12183134pfe.36.2018.10.01.05.31.58; Mon, 01 Oct 2018 05:31:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=Lad5CemX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729452AbeJATJb (ORCPT + 32 others); Mon, 1 Oct 2018 15:09:31 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:19147 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728979AbeJATJ3 (ORCPT ); Mon, 1 Oct 2018 15:09:29 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-12.nifty.com with ESMTP id w91CVGkA019301; Mon, 1 Oct 2018 21:31:18 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com w91CVGkA019301 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1538397079; bh=PEzsMrwJXw0LoSxVFtwvUIo6tex365qXteYhXs9PfIk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Lad5CemXH1TEKWVzTN3q9QYbYm53l3Vm3ZFvZye54fdMX2IOAOWcEB9fTB78/Ixfd h0EenAumHtagTjLB+uWRIPL8ZQ5Ilig653TE78yKF3qKRoDXLTrZ081t8HX+rPQizo /3rgn8ggoMX5RolQtQ3JOqoWVgmvMCS3pVb674wsaFzn80fjlnxZOqGKTHeM8UrAuL MyNnpcOBg9e0ZZzZ9vTldsQdB38bK7Z2CA2C4cz1QtyZ3SjCwoQBmqZ2v/wxmJ6QuG qumaiX6nAoxsL7Fo9UE9KFsLfW/aTJMF1efsC4QrGfcPinuYQlXMMqCv76gTk3HpFy 1RrEs31REDJTQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Wolfram Sang , linux-mmc@vger.kernel.org Cc: Ulf Hansson , linux-renesas-soc@vger.kernel.org, Masahiro Yamada , Lee Jones , linux-kernel@vger.kernel.org Subject: [PATCH 2/2] mmc: tmio: remove TMIO_MMC_HAVE_HIGH_REG flag Date: Mon, 1 Oct 2018 21:31:02 +0900 Message-Id: <1538397062-19162-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1538397062-19162-1-git-send-email-yamada.masahiro@socionext.com> References: <1538397062-19162-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org TMIO_MMC_HAVE_HIGH_REG is confusing due to its counter-intuitive name. All the TMIO MMC variants (TMIO MMC, Renesas SDHI, UniPhier SD) actually have high registers. It is just that each of them implements its own registers there. The original IP from Panasonic only defines registers 0x00-0xff in the bus_shift=1 review. The register area above them is platform-dependent. In fact, TMIO_MMC_HAVE_HIGH_REG is set only by tmio-mmc.c and used to test the accessibility of CTL_SDIO_REGS. Because it is specific to the TMIO MFD variant, the right thing to do is to move such registers to tmio_mmc.c and delete the TMIO_MMC_HAVE_HIGH_REG flag. Signed-off-by: Masahiro Yamada --- drivers/mmc/host/tmio_mmc.c | 7 +++++-- drivers/mmc/host/tmio_mmc.h | 3 --- include/linux/mfd/tmio.h | 7 ------- 3 files changed, 5 insertions(+), 12 deletions(-) -- 2.7.4 diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c index c8e90cf..9348608 100644 --- a/drivers/mmc/host/tmio_mmc.c +++ b/drivers/mmc/host/tmio_mmc.c @@ -24,6 +24,11 @@ #include "tmio_mmc.h" +/* Registers specific to this variant */ +#define CTL_SDIO_REGS 0x100 +#define CTL_CLK_AND_WAIT_CTL 0x138 +#define CTL_RESET_SDIO 0x1e0 + static void tmio_mmc_clk_start(struct tmio_mmc_host *host) { sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN | @@ -153,8 +158,6 @@ static int tmio_mmc_probe(struct platform_device *pdev) goto cell_disable; } - pdata->flags |= TMIO_MMC_HAVE_HIGH_REG; - host = tmio_mmc_host_alloc(pdev, pdata); if (IS_ERR(host)) { ret = PTR_ERR(host); diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index a1a661b..18b4308 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h @@ -47,9 +47,6 @@ #define CTL_RESET_SD 0xe0 #define CTL_VERSION 0xe2 #define CTL_SDIF_MODE 0xe6 -#define CTL_SDIO_REGS 0x100 -#define CTL_CLK_AND_WAIT_CTL 0x138 -#define CTL_RESET_SDIO 0x1e0 /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */ #define TMIO_STOP_STP BIT(0) diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h index 7786621..1e70060 100644 --- a/include/linux/mfd/tmio.h +++ b/include/linux/mfd/tmio.h @@ -62,13 +62,6 @@ #define TMIO_MMC_USE_GPIO_CD BIT(5) /* - * Some controllers doesn't have over 0x100 register. - * it is used to checking accessibility of - * CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL - */ -#define TMIO_MMC_HAVE_HIGH_REG BIT(6) - -/* * Some controllers have CMD12 automatically * issue/non-issue register */