From patchwork Thu Sep 20 19:18:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 147147 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp2376561ljw; Thu, 20 Sep 2018 12:19:07 -0700 (PDT) X-Google-Smtp-Source: ANB0VdaBCbjfptUvaFmTkhE+3fIllGR45YP6XQdKYo0YBU4k6Jl27LUnoFq4CcB1vposkPj1thzE X-Received: by 2002:a17:902:a715:: with SMTP id w21-v6mr40817028plq.61.1537471146980; Thu, 20 Sep 2018 12:19:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1537471146; cv=none; d=google.com; s=arc-20160816; b=blS1gVB5I6/Vn/DOKih6SGJmzhv2s9Jtx3TXbrXIbwRAu0n3AfkHDD5yY81UK3nDby Zd9e3fGrDcWjWOFKcNqADORhM33hm3KDcpl4ioTyaVVqKEkSBjMLQ4QUTFTEZY7J+mRj ReAxl9Vkyd0JcQ9JB56vlA8tz2GE+CEyS2uHb74j7yM2n5R/Lp5oKHyWlO6Z9RSJ06Pq e0MVpGiwEGJFADXlglnmJdRvVM4Hi8HBmdhoH3xfGs/JXFj/sH0CYL785pWfkVmk07Dr EQEbP2XY2RKHJUYNC8bEFINRc/6b1KaoStVbPk9a+0lW/ubod6jV83i/9KQGLu4l5Mk+ kV2w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=ZmIfhLlS7No2zlitXufekMnQETwoKFvLJIWVS3LdmXc=; b=qyT8e849kco3Mvb70Amr2Bohw45BTSFidmZ0ScqK1vp7GQI9iBT8rqmag1CXUnLNB1 o1WGiOnzbX0XFkkOAVuA30LnMUB+HupBr3rMokDLxI5ZU3axEs0yD7qEk4p/f2YoIm+l Qrujh17Po9nZ0UWVp6t3D6AXo8Xp7+3//uCr4FbMcunUQQWIlxFOl4wc+hJWezFXZXZo nVCHjLGiavRwtx/qJqmV7n4ygAkloHXPdxi87foHhkvmXP2gYy1lszKBiYoOK21PTq/T 5GxOPXijhn6Gc+jtHNWcVj0AGndxpy/lh/1I/cYeDWX/HEsWqLLZnB6uSqpgKAloQbmO LgMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bz+W0Kbr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n34-v6si2369530pld.311.2018.09.20.12.19.06; Thu, 20 Sep 2018 12:19:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bz+W0Kbr; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388990AbeIUBED (ORCPT + 32 others); Thu, 20 Sep 2018 21:04:03 -0400 Received: from mail-pl1-f193.google.com ([209.85.214.193]:45868 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388559AbeIUBEC (ORCPT ); Thu, 20 Sep 2018 21:04:02 -0400 Received: by mail-pl1-f193.google.com with SMTP id j8-v6so4778260pll.12 for ; Thu, 20 Sep 2018 12:19:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZmIfhLlS7No2zlitXufekMnQETwoKFvLJIWVS3LdmXc=; b=bz+W0KbrReWypHhIqQ3ztUzSPz/Uo+ksBhPwRSyA3LU8ELb0UeBjTMIIYCERFWgp4d WdWjfRTwe+RKB32HQ2nppIFK69vmgEDndKq9ozst/cj3pNWtn8xq57/49xeqNnsonLPh PxtUgWHBFqqXIXGjWo0RsuNMzRNfAsof3AR58= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZmIfhLlS7No2zlitXufekMnQETwoKFvLJIWVS3LdmXc=; b=EP6H40kSAwcWipikGdKcywjNgA2zprJAT68GcOANN8/o8pvJkWuPbe0Kee1mF/lo/6 GVDeFydwVJc6vRjzBYQxPDiVXQjHdXhZSiG7i1KsY2RSo73MOYtOOg/YRbbkWPnGlwu8 wjKh17iYbOB7nu3Mavol+Aqklry949o2v0vOb3FvYiDcgHa+va3YkkIeOAXP7V5Aq8/i JU+lyogLidJRTgHqvGA5ShGMwkNg1I6I349+fG4lk6J09+UsoBWYBkTaqogU+k0APmzX K+WTh/zkea0SKfuCJ5kHHTfIMPD8+R7gAtzQTFKsRY+Z0i4PAiFAurTf+WuQ8TYmug/v Ax6A== X-Gm-Message-State: APzg51CQQV4Ywwepb4l7zh4kt/gkeizyt9MiUB9fZl90e6rUe7KAC2Jp GBFAai//SS4chWekttjLHuGCTA== X-Received: by 2002:a17:902:7291:: with SMTP id d17-v6mr5753867pll.260.1537471143540; Thu, 20 Sep 2018 12:19:03 -0700 (PDT) Received: from localhost.localdomain ([209.121.128.187]) by smtp.gmail.com with ESMTPSA id k13-v6sm4424443pgf.37.2018.09.20.12.19.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Sep 2018 12:19:01 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-kernel@vger.kernel.org Subject: [PATCH 27/44] coresight: tmc: Fix byte-address alignment for RRP Date: Thu, 20 Sep 2018 13:18:02 -0600 Message-Id: <1537471099-19781-28-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> References: <1537471099-19781-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Leo Yan >From the comment in the code, it claims the requirement for byte-address alignment for RRP register: 'for 32-bit, 64-bit and 128-bit wide trace memory, the four LSBs must be 0s. For 256-bit wide trace memory, the five LSBs must be 0s'. This isn't consistent with the program, the program sets five LSBs as zeros for 32/64/128-bit wide trace memory and set six LSBs zeros for 256-bit wide trace memory. After checking with the CoreSight Trace Memory Controller technical reference manual (ARM DDI 0461B, section 3.3.4 RAM Read Pointer Register), it proves the comment is right and the program does wrong setting. This patch fixes byte-address alignment for RRP by following correct definition in the technical reference manual. Cc: Mathieu Poirier Cc: Mike Leach Signed-off-by: Leo Yan Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.7.4 diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 4bf3bfd7c078..b54a3db13fee 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -417,10 +417,10 @@ static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev, case TMC_MEM_INTF_WIDTH_32BITS: case TMC_MEM_INTF_WIDTH_64BITS: case TMC_MEM_INTF_WIDTH_128BITS: - mask = GENMASK(31, 5); + mask = GENMASK(31, 4); break; case TMC_MEM_INTF_WIDTH_256BITS: - mask = GENMASK(31, 6); + mask = GENMASK(31, 5); break; }