From patchwork Fri Sep 7 07:28:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 146185 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp840534ljw; Fri, 7 Sep 2018 00:30:26 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZFOJewdfYPn228F7FgXnGuXCBzhTuNlu3q5LBogV7ZvWKdJb9IoCY2tTBqRdh2vtf5wFE0 X-Received: by 2002:a17:902:468:: with SMTP id 95-v6mr6428034ple.122.1536305426666; Fri, 07 Sep 2018 00:30:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536305426; cv=none; d=google.com; s=arc-20160816; b=vlaSYpL6ItN/nor8Dw7sy1QtMdLNrnYAh3/jDqQJvwWt23uQKb576CA2G5PT0+M7Dk OmM5aOgrd9wgT6SsYKb+MTZCcPYqKLfJTqX7XTLngpta4vMrfwKNI7J2AhKZAWiV4mit QZwnmmkqwvM20VzFIgy3mDrpU6ga03ovXvvIeNwLiRvnTWO3sXlxjeUPwmjFE9+C2C1q nTOy+WyddDI7H3xI3LDnDg76/oNHRrZMLQ7oe/Fe+cYLj8UqKztKrgTx5AT2ZiVa0qjt qM/UHUbGliFfgBPLv/a3z6DuHyIAw7POPv+aVSJPd9Pb9YUYFyXMFvdtHRx3YjZqYc6Z ftOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter; bh=lyWnOAp3I+3UJW0TfDWy3SsWLcOJ5PwhrpW6yH3rIYQ=; b=F4Pbnx+dN54UVfAAV1WeVPBJTswCLKUJCoApCeg7abzHJTIpsfBsfSOe1Owle5f0JA M+sA1LajwEDwfwHUNSa2+DuE6r0QReJBzd8H3to3f+aJ57E26bYWv+auMtrHDsS5jHLR ymxciWnr2k0RpKOSm6d+9qkXAS9SyrxKDtVQsu0l+zCWfiBpGYbkcddG1Y2JoB+kGfTX A+T/wFokBE1zAtBL0OuGe7OhqQlpERnYJ7U5zQh3S/dFtQ5vYKTMQB/14oDZNrqHMoCL oTqUr1rxspemFyaIjb1yA5cqP2pcnLLBEXTAyH3kFrZwdz1ymyBMImrNWvAkjuO5ph16 q1TA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=ZD5Mk4AG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w3-v6si7442364pgb.119.2018.09.07.00.30.26; Fri, 07 Sep 2018 00:30:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b=ZD5Mk4AG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727755AbeIGMKB (ORCPT + 32 others); Fri, 7 Sep 2018 08:10:01 -0400 Received: from conuserg-09.nifty.com ([210.131.2.76]:51324 "EHLO conuserg-09.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726655AbeIGMJ4 (ORCPT ); Fri, 7 Sep 2018 08:09:56 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id w877Sg3x001106; Fri, 7 Sep 2018 16:28:43 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com w877Sg3x001106 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1536305323; bh=lyWnOAp3I+3UJW0TfDWy3SsWLcOJ5PwhrpW6yH3rIYQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZD5Mk4AG2IYEWLrH47wdL0zqDSUVj39uiK8xGUqvwh8TG0NRU9uJmjy5ZgJWc2WqA OQACpERxspIo84K+vFJ9euqbEqxR7xzkXrDgvo/UKG7FWRsSzgq/H2usHcHGh+6RF0 zAidLrQ5GhyoPwCm3IZy81QodmwaICKOkr2OFFoH4Bemem7tT3Ms032f6KZqsD0dYN MaBFGM4J3zOXSTAlWC7SDu3Kbs+Oh1MurQ6hn2vSBG9IxQTCVt4PuJpZcSx54MaUs3 qx7Nqrn0+uXSnyNhTqH+hc8dMu2g3viEd1MYRe4/AeFEYO0Hv1pu8xb1iqnDuld15+ K0aX6beCoJeag== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-mtd@lists.infradead.org, Boris Brezillon , Miquel Raynal Cc: Masahiro Yamada , linux-kernel@vger.kernel.org, Marek Vasut , Brian Norris , Richard Weinberger , David Woodhouse Subject: [PATCH 1/2] mtd: rawnand: denali: remove ->dev_ready() hook Date: Fri, 7 Sep 2018 16:28:28 +0900 Message-Id: <1536305309-28026-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536305309-28026-1-git-send-email-yamada.masahiro@socionext.com> References: <1536305309-28026-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Denali NAND IP has no way to read out the current signal level of the R/B# pin. Instead, denali_dev_ready() checks if the R/B# transition has already happened. (The INTR__INT_ACT interrupt is asserted at the rising edge of the R/B# pin.) It is not a correct way to implement the ->dev_ready() hook. In fact, it has a drawback; in the nand_scan_ident phase, the chip detection iterates over maxchips until it fails to find a homogeneous chip. For the last loop, nand_reset() fails if no chip is there. If ->dev_ready hook exists, nand_command(_lp) calls nand_wait_ready() after NAND_CMD_RESET. However, we know denali_dev_ready() never returns 1 unless there exists a chip that toggles R/B# in that chip select. Then, nand_wait_ready() just ends up with wasting 400 msec, in the end, shows the "timeout while waiting for chip to become ready" warning. Let's remove the mis-implemented dev_ready hook, and fallback to sending the NAND_CMD_STATUS and nand_wait_status_ready(), which bails out more quickly. Signed-off-by: Masahiro Yamada --- drivers/mtd/nand/raw/denali.c | 22 +--------------------- 1 file changed, 1 insertion(+), 21 deletions(-) -- 2.7.4 diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c index f88a5dc..f069184 100644 --- a/drivers/mtd/nand/raw/denali.c +++ b/drivers/mtd/nand/raw/denali.c @@ -203,18 +203,6 @@ static uint32_t denali_wait_for_irq(struct denali_nand_info *denali, return denali->irq_status; } -static uint32_t denali_check_irq(struct denali_nand_info *denali) -{ - unsigned long flags; - uint32_t irq_status; - - spin_lock_irqsave(&denali->irq_lock, flags); - irq_status = denali->irq_status; - spin_unlock_irqrestore(&denali->irq_lock, flags); - - return irq_status; -} - static void denali_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) { struct denali_nand_info *denali = mtd_to_denali(mtd); @@ -294,7 +282,7 @@ static void denali_cmd_ctrl(struct mtd_info *mtd, int dat, unsigned int ctrl) return; /* - * Some commands are followed by chip->dev_ready or chip->waitfunc. + * Some commands are followed by chip->waitfunc. * irq_status must be cleared here to catch the R/B# interrupt later. */ if (ctrl & NAND_CTRL_CHANGE) @@ -303,13 +291,6 @@ static void denali_cmd_ctrl(struct mtd_info *mtd, int dat, unsigned int ctrl) denali->host_write(denali, DENALI_BANK(denali) | type, dat); } -static int denali_dev_ready(struct mtd_info *mtd) -{ - struct denali_nand_info *denali = mtd_to_denali(mtd); - - return !!(denali_check_irq(denali) & INTR__INT_ACT); -} - static int denali_check_erased_page(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf, unsigned long uncor_ecc_flags, @@ -1349,7 +1330,6 @@ int denali_init(struct denali_nand_info *denali) chip->write_byte = denali_write_byte; chip->read_word = denali_read_word; chip->cmd_ctrl = denali_cmd_ctrl; - chip->dev_ready = denali_dev_ready; chip->waitfunc = denali_waitfunc; if (features & FEATURES__INDEX_ADDR) {