From patchwork Tue Jun 19 12:53:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 139115 Delivered-To: patch@linaro.org Received: by 2002:a2e:970d:0:0:0:0:0 with SMTP id r13-v6csp5171937lji; Tue, 19 Jun 2018 05:54:45 -0700 (PDT) X-Google-Smtp-Source: ADUXVKITKpxYIHHRG4liIdyV/lclkEa3xdv/5U8c6cDe/p9hdBJgUiSVNlpE7pnODX/6BUAr1FrB X-Received: by 2002:a62:c809:: with SMTP id z9-v6mr17864573pff.5.1529412885614; Tue, 19 Jun 2018 05:54:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1529412885; cv=none; d=google.com; s=arc-20160816; b=MsxRRsy4mS9k5Z9rKVR/w0b8z6/wL7V6mMU7Hhs++0m1XQBWwnYt2HfjsHObuM5k/w Dtm9GjGrsdltJQeT+q/HDGPTfs/NfF/2FVTQms3xgpLvnrNJfBqiiuxu2mMOQ8KMtAy8 6LQ3zGUWfndmdFxVkfQecbjO+yYXYRh4EFIEEKhVfwNB1g5hwVuHnRGCBqFQcVx83+nC sfwCQ39T+24fMP1j9gtv5HmMgkXPiCuE6ql5pP/j3fyBP0B0V/zmGsCLSwrHqUheF/ss dn9OIhszGBk6A4IjaIzSd27vL6rPI6DCmGsvQt/qKkL8iH3oHABrosd2oLpbXJ38f2LM 0s0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=ehHdJ4LsNsqNhHnj95klPGEjcvaQcsXJ3PZ+8dL51Bg=; b=mvXXn3XZGz+F/1usYrPmr5F7Tce2y6FNT8XdtvuypppGy7NHF348tmiv4O77pkd8vM mvXY0U3jXQKo6mLc97dHEK7ohxPX7Yaxdh4TApXp5uXswQFGbTP7fqP5P+5Soz5ZrtqT ecEbFzMhbo3sQvpMqkPeAgJSiZLYQvaPxJft4kSb7DKCJHn5nK3OTHaK+thtfojYUGdK kV49fX3rSIafyo8iaUrJuaKDk9CFWIXnzoyAgBy8ym+ubvIB1iw54Ercq7YNpAUEJ8ZM UJTzZae5dyIxdWN5F7oy9eBVua/oeowGQCNmFh4N29qPEjfPCa2/E7ArqqBieP5pInfj Az1A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e9-v6si14024571pgo.397.2018.06.19.05.54.45; Tue, 19 Jun 2018 05:54:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937902AbeFSMym (ORCPT + 30 others); Tue, 19 Jun 2018 08:54:42 -0400 Received: from foss.arm.com ([217.140.101.70]:49354 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S937859AbeFSMwl (ORCPT ); Tue, 19 Jun 2018 08:52:41 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1368B1682; Tue, 19 Jun 2018 05:52:41 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D96163F5B6; Tue, 19 Jun 2018 05:52:40 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id ECDF91AE3700; Tue, 19 Jun 2018 13:53:15 +0100 (BST) From: Will Deacon To: linux-kernel@vger.kernel.org Cc: peterz@infradead.org, mingo@kernel.org, linux-arm-kernel@lists.infradead.org, yamada.masahiro@socionext.com, Will Deacon Subject: [RESEND PATCH v2 7/9] asm-generic/bitops/lock.h: Rewrite using atomic_fetch_* Date: Tue, 19 Jun 2018 13:53:12 +0100 Message-Id: <1529412794-17720-8-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1529412794-17720-1-git-send-email-will.deacon@arm.com> References: <1529412794-17720-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The lock bitops can be implemented more efficiently using the atomic_fetch_* ops, which provide finer-grained control over the memory ordering semantics than the bitops. Cc: Peter Zijlstra Cc: Ingo Molnar Acked-by: Peter Zijlstra (Intel) Signed-off-by: Will Deacon --- include/asm-generic/bitops/lock.h | 68 ++++++++++++++++++++++++++++++++------- 1 file changed, 56 insertions(+), 12 deletions(-) -- 2.1.4 diff --git a/include/asm-generic/bitops/lock.h b/include/asm-generic/bitops/lock.h index 67ab280ad134..3ae021368f48 100644 --- a/include/asm-generic/bitops/lock.h +++ b/include/asm-generic/bitops/lock.h @@ -2,6 +2,10 @@ #ifndef _ASM_GENERIC_BITOPS_LOCK_H_ #define _ASM_GENERIC_BITOPS_LOCK_H_ +#include +#include +#include + /** * test_and_set_bit_lock - Set a bit and return its old value, for lock * @nr: Bit to set @@ -11,7 +15,20 @@ * the returned value is 0. * It can be used to implement bit locks. */ -#define test_and_set_bit_lock(nr, addr) test_and_set_bit(nr, addr) +static inline int test_and_set_bit_lock(unsigned int nr, + volatile unsigned long *p) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + p += BIT_WORD(nr); + if (READ_ONCE(*p) & mask) + return 1; + + old = atomic_long_fetch_or_acquire(mask, (atomic_long_t *)p); + return !!(old & mask); +} + /** * clear_bit_unlock - Clear a bit in memory, for unlock @@ -20,11 +37,11 @@ * * This operation is atomic and provides release barrier semantics. */ -#define clear_bit_unlock(nr, addr) \ -do { \ - smp_mb__before_atomic(); \ - clear_bit(nr, addr); \ -} while (0) +static inline void clear_bit_unlock(unsigned int nr, volatile unsigned long *p) +{ + p += BIT_WORD(nr); + atomic_long_fetch_andnot_release(BIT_MASK(nr), (atomic_long_t *)p); +} /** * __clear_bit_unlock - Clear a bit in memory, for unlock @@ -37,11 +54,38 @@ do { \ * * See for example x86's implementation. */ -#define __clear_bit_unlock(nr, addr) \ -do { \ - smp_mb__before_atomic(); \ - clear_bit(nr, addr); \ -} while (0) +static inline void __clear_bit_unlock(unsigned int nr, + volatile unsigned long *p) +{ + unsigned long old; -#endif /* _ASM_GENERIC_BITOPS_LOCK_H_ */ + p += BIT_WORD(nr); + old = READ_ONCE(*p); + old &= ~BIT_MASK(nr); + atomic_long_set_release((atomic_long_t *)p, old); +} + +/** + * clear_bit_unlock_is_negative_byte - Clear a bit in memory and test if bottom + * byte is negative, for unlock. + * @nr: the bit to clear + * @addr: the address to start counting from + * + * This is a bit of a one-trick-pony for the filemap code, which clears + * PG_locked and tests PG_waiters, + */ +#ifndef clear_bit_unlock_is_negative_byte +static inline bool clear_bit_unlock_is_negative_byte(unsigned int nr, + volatile unsigned long *p) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + p += BIT_WORD(nr); + old = atomic_long_fetch_andnot_release(mask, (atomic_long_t *)p); + return !!(old & BIT(7)); +} +#define clear_bit_unlock_is_negative_byte clear_bit_unlock_is_negative_byte +#endif +#endif /* _ASM_GENERIC_BITOPS_LOCK_H_ */