From patchwork Fri Jun 1 16:06:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 137544 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp1127686lji; Fri, 1 Jun 2018 09:07:15 -0700 (PDT) X-Google-Smtp-Source: ADUXVKKiEq6iM88LW6aw/a/2cR5Ntlvt52bU5QC1p4H3lP92AVrR43A8ksVmKSZLPwEZIgV+XsvX X-Received: by 2002:a63:a119:: with SMTP id b25-v6mr4540167pgf.279.1527869235480; Fri, 01 Jun 2018 09:07:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527869235; cv=none; d=google.com; s=arc-20160816; b=wIud3l7fL5jXY29mD65LIrXtMuvnIbYXqUYyO4mIyRnKdcToIXuw5415arFRPRuJgM 1H8Gzwy3VlHCOi81Bc44mMJLVvpXPtqNuk7qODCPx7EVpta6pM7sKJ8BhjpTvc7IQOPa bPf9bMP42WhuXmvUNwYfdqpmOzMR5+qFSE5ga08dTdnRvqIpM2zEVg8ytyBYGeycCWMd Aj1+GbwDXcOnrvmaZF60I9QMU+impnod66eUciW8u549KRzncCDA+FzUBXwKuG0XcbBr YPGok3DZmY7D1KVzf54apXQWVAVWycG+Ht6pN0xcqVdNSk/0rcf0vNeQ4r+Y22bkyhEU fUNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=n3bChh5u1Vbmh9Huh5A1pqswxh6z1axa6kHAyv6GYH8=; b=ocCPlNKsmCgf6TF2P680x/wMq8gGRNhDlAfC/zdv7PT+ivNB+Ux42AFFy2Mzak0Kby s/osBaw8Y7kay+vRKNntBLvtbO/C57nd7aq1slu7R8HDkb7sgWxc+TREHlrIHGdMIy57 6C7lVAOFUxnT7GVsjuFDkMIzcAJjeFVL00NIYe37JynE88NYfiHMs/mKxOeIXXZ4V2HP Qm2KY1dWXLQszTGXYrh8Yu42ACU61Sk7KMIp2pc/24I6ord1JOfdkeKHKU2HZGjCAjlF a5ORVDOPEgb1uzCdzLHNVj+G/syzGKKmEA3opXPTSDNNh+8XO/sDcutfxlLrId6I04fm ZuZQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h12-v6si40156393pfd.253.2018.06.01.09.07.15; Fri, 01 Jun 2018 09:07:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753297AbeFAQHM (ORCPT + 30 others); Fri, 1 Jun 2018 12:07:12 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:55030 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752360AbeFAQGA (ORCPT ); Fri, 1 Jun 2018 12:06:00 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B12581688; Fri, 1 Jun 2018 09:06:00 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 82EBC3F5C9; Fri, 1 Jun 2018 09:06:00 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 8302F1AE519B; Fri, 1 Jun 2018 17:06:30 +0100 (BST) From: Will Deacon To: linux-kernel@vger.kernel.org Cc: peterz@infradead.org, mingo@kernel.org, linux-arm-kernel@lists.infradead.org, yamada.masahiro@socionext.com, Will Deacon Subject: [PATCH v2 7/9] asm-generic/bitops/lock.h: Rewrite using atomic_fetch_* Date: Fri, 1 Jun 2018 17:06:27 +0100 Message-Id: <1527869189-31512-8-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1527869189-31512-1-git-send-email-will.deacon@arm.com> References: <1527869189-31512-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The lock bitops can be implemented more efficiently using the atomic_fetch_* ops, which provide finer-grained control over the memory ordering semantics than the bitops. Cc: Peter Zijlstra Cc: Ingo Molnar Signed-off-by: Will Deacon --- include/asm-generic/bitops/lock.h | 68 ++++++++++++++++++++++++++++++++------- 1 file changed, 56 insertions(+), 12 deletions(-) -- 2.1.4 diff --git a/include/asm-generic/bitops/lock.h b/include/asm-generic/bitops/lock.h index 67ab280ad134..3ae021368f48 100644 --- a/include/asm-generic/bitops/lock.h +++ b/include/asm-generic/bitops/lock.h @@ -2,6 +2,10 @@ #ifndef _ASM_GENERIC_BITOPS_LOCK_H_ #define _ASM_GENERIC_BITOPS_LOCK_H_ +#include +#include +#include + /** * test_and_set_bit_lock - Set a bit and return its old value, for lock * @nr: Bit to set @@ -11,7 +15,20 @@ * the returned value is 0. * It can be used to implement bit locks. */ -#define test_and_set_bit_lock(nr, addr) test_and_set_bit(nr, addr) +static inline int test_and_set_bit_lock(unsigned int nr, + volatile unsigned long *p) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + p += BIT_WORD(nr); + if (READ_ONCE(*p) & mask) + return 1; + + old = atomic_long_fetch_or_acquire(mask, (atomic_long_t *)p); + return !!(old & mask); +} + /** * clear_bit_unlock - Clear a bit in memory, for unlock @@ -20,11 +37,11 @@ * * This operation is atomic and provides release barrier semantics. */ -#define clear_bit_unlock(nr, addr) \ -do { \ - smp_mb__before_atomic(); \ - clear_bit(nr, addr); \ -} while (0) +static inline void clear_bit_unlock(unsigned int nr, volatile unsigned long *p) +{ + p += BIT_WORD(nr); + atomic_long_fetch_andnot_release(BIT_MASK(nr), (atomic_long_t *)p); +} /** * __clear_bit_unlock - Clear a bit in memory, for unlock @@ -37,11 +54,38 @@ do { \ * * See for example x86's implementation. */ -#define __clear_bit_unlock(nr, addr) \ -do { \ - smp_mb__before_atomic(); \ - clear_bit(nr, addr); \ -} while (0) +static inline void __clear_bit_unlock(unsigned int nr, + volatile unsigned long *p) +{ + unsigned long old; -#endif /* _ASM_GENERIC_BITOPS_LOCK_H_ */ + p += BIT_WORD(nr); + old = READ_ONCE(*p); + old &= ~BIT_MASK(nr); + atomic_long_set_release((atomic_long_t *)p, old); +} + +/** + * clear_bit_unlock_is_negative_byte - Clear a bit in memory and test if bottom + * byte is negative, for unlock. + * @nr: the bit to clear + * @addr: the address to start counting from + * + * This is a bit of a one-trick-pony for the filemap code, which clears + * PG_locked and tests PG_waiters, + */ +#ifndef clear_bit_unlock_is_negative_byte +static inline bool clear_bit_unlock_is_negative_byte(unsigned int nr, + volatile unsigned long *p) +{ + long old; + unsigned long mask = BIT_MASK(nr); + + p += BIT_WORD(nr); + old = atomic_long_fetch_andnot_release(mask, (atomic_long_t *)p); + return !!(old & BIT(7)); +} +#define clear_bit_unlock_is_negative_byte clear_bit_unlock_is_negative_byte +#endif +#endif /* _ASM_GENERIC_BITOPS_LOCK_H_ */