From patchwork Tue May 29 18:26:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 137210 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp4381321lji; Tue, 29 May 2018 11:27:31 -0700 (PDT) X-Google-Smtp-Source: AB8JxZpV2RbaTSdfPfKZFetFNSMSDX8ONdp9qnSR+zp5N96FPFU69IEAbYnmIwTIcPkzxU43wMe3 X-Received: by 2002:a17:902:7283:: with SMTP id d3-v6mr18958072pll.192.1527618450913; Tue, 29 May 2018 11:27:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527618450; cv=none; d=google.com; s=arc-20160816; b=iQ+rN4PU8Ipc9caugeQCostUD1L+jQ8Qgr+LlqESysy/VXS7gx4dirxsRtJK8ugVQp Z7AoCDd1y0+4BQGd6XACceNs6vohxEGb4zqFkITPk2GC3CkF0HMBjh+sqw0Ce0vhMOH1 H+YNO4y8Sq0vPxm8hD1XgWPsE79KaRXpPvUUn6ujtLXNiVg2XaX/OrzYYRrLKk7ZcCQv 36IcxEfpIk6k+qEhPaQ4tMCClZ6CHEgf11i9jW5AdMDMCQ0H2VVUp4X/1cPcdfkF9uqf KR4Bsjq6egjj35Ha+vSjkKXxSjjqigs+3Vcc8TEPIkyjIsoVWj7Hv/JPi+3b01Y7UAO1 jfEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=hQ9MLGg5IslBq9JKbVpfLcf9DHRsW5Q09qHLxZeFlFc=; b=M3uOBEX38R72dMvTcGhT0Fk4LG9lhd82EVWduKfIkP8Cdk0OH3VzH0m57p9ek4BreB zgnlV1/uvr2XhXiLu+ufAa14skpNUa67h+6SFtslz4t2WxGxL82yh3THwDO9Hx1CxNUk 1goyu+4M7Z6XOSVQ7huyIAuICIyFShZTF0MyCIWFQALKX19UFext9odGEa3uYN42d1eT 6UMykswH24yWPyK26aOBWKqX+s8qruzsv+C/jNx7iTwvyUnCw7O4ijKcJZXVdeAfDZBC KM5dnfqYRZ4FTi+j9cfQnEDsQqI0il++SQY0bJLi4x3IowfMzVKHWLLDnKnrdKA36f6P jGWA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UYGkRUqm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k14-v6si10905982pgn.99.2018.05.29.11.27.30; Tue, 29 May 2018 11:27:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UYGkRUqm; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966172AbeE2S12 (ORCPT + 30 others); Tue, 29 May 2018 14:27:28 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:50871 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965874AbeE2S1Q (ORCPT ); Tue, 29 May 2018 14:27:16 -0400 Received: by mail-wm0-f67.google.com with SMTP id t11-v6so43215788wmt.0 for ; Tue, 29 May 2018 11:27:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hQ9MLGg5IslBq9JKbVpfLcf9DHRsW5Q09qHLxZeFlFc=; b=UYGkRUqmppcOw5lIsthtyDcd245u6l6QHxZQbYj9E1KvOTFc2f9NfRaBiwJqu08+dF wCNJhC8rZ+CYPx4YncEz8bS5XGh4NjElvJ7cWbaFP2kkKxKd4D7NoMAOpP15Pi7dEq27 sLrXL6k25/iT9G8k/G9ujLe98t2NzvXDgSH/8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hQ9MLGg5IslBq9JKbVpfLcf9DHRsW5Q09qHLxZeFlFc=; b=aMNTpOxIF61jjDPw5rGipDb8uIJ2ShGTb2cwKz5vBtQTKNmMwsSlOVKFaWKMS/QoQf jcTWh2iPKsZLPnZhJ8u9iS17GUuGgKXOlU0gN5/Itw8nS/wNeOYvgcDW3wXw+ezsRu8S c19u3BAbc92fQ6WUExAv4x7rPpHnvpuzjmzVfpntbYdp47vNiBGDR6tr7rKc+Ee90zYN kBH5ZoQpq+NrGWfTpiB4kM+qvHxUuXhLJycUNw0qoIXbeVgowpp/8vDf1HlwPxUB7Oi4 M7Skbk+WVIZhrBWQFPxoDgdOKPhk3vybLxJgCYWZS2cCn5J6mR5vnZRGvjHkLc8w9vnH teuw== X-Gm-Message-State: ALKqPweHynptlBER+VPTLatEMxFvgitP00GevS0d2z2x7LD+BAPma5FQ DMLiNQNCesdPnflNy2yG6e1jJQ== X-Received: by 2002:a1c:8b88:: with SMTP id n130-v6mr24277wmd.8.1527618435410; Tue, 29 May 2018 11:27:15 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:c07c:1556:b860:2283]) by smtp.gmail.com with ESMTPSA id 135-v6sm27027893wmx.21.2018.05.29.11.27.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 29 May 2018 11:27:02 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Eugeniy Paltsev , Vineet Gupta , linux-snps-arc@lists.infradead.org (open list:SYNOPSYS ARC ARCHITECTURE) Subject: [PATCH 3/7] clocksource/drivers/arc_timer: Add comments about locking while read GFRC Date: Tue, 29 May 2018 20:26:38 +0200 Message-Id: <1527618402-31974-3-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1527618402-31974-1-git-send-email-daniel.lezcano@linaro.org> References: <1274a543-02dd-bbf0-c690-b08c788d9e91@linaro.org> <1527618402-31974-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Eugeniy Paltsev This came to light in some internal discussions and it is nice to have this documented rather than digging up the PRM (Prog Ref Manual) again. Signed-off-by: Eugeniy Paltsev Acked-by: Vineet Gupta Signed-off-by: Daniel Lezcano --- drivers/clocksource/arc_timer.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.7.4 diff --git a/drivers/clocksource/arc_timer.c b/drivers/clocksource/arc_timer.c index 471b428..20da9b1 100644 --- a/drivers/clocksource/arc_timer.c +++ b/drivers/clocksource/arc_timer.c @@ -61,6 +61,20 @@ static u64 arc_read_gfrc(struct clocksource *cs) unsigned long flags; u32 l, h; + /* + * From a programming model pov, there seems to be just one instance of + * MCIP_CMD/MCIP_READBACK however micro-architecturally there's + * an instance PER ARC CORE (not per cluster), and there are dedicated + * hardware decode logic (per core) inside ARConnect to handle + * simultaneous read/write accesses from cores via those two registers. + * So several concurrent commands to ARConnect are OK if they are + * trying to access two different sub-components (like GFRC, + * inter-core interrupt, etc...). HW also supports simultaneously + * accessing GFRC by multiple cores. + * That's why it is safe to disable hard interrupts on the local CPU + * before access to GFRC instead of taking global MCIP spinlock + * defined in arch/arc/kernel/mcip.c + */ local_irq_save(flags); __mcip_cmd(CMD_GFRC_READ_LO, 0);